CPLD/FPGA, software and 10 years support

When several organisations are involved in the chain and half of them are aerospace, getting things that have been specified changed takes time and a LOT of paperwork.

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Paul Carpenter          | paul@pcserviceselectronics.co.uk
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Paul Carpenter
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And how did a flash drive come into this picture? Typical data retention is about 10 years.....

Meindert

Reply to
Meindert Sprang

Paul; Take a look at Xilinx XC9500XL family - similar to XC9500 family but low power. XL runs on 3.3v, but is 5 volt I/O tolerant. The XC95144XL looks like it will meet your requirements (it has 144 regs,

81 I/Os in TQFP-100 package), and it looks like it may meet your Icc requirements, too. 9500XL is also cheaper than 9500, but for 10 units I don't suppose that matters. As others have suggested, use older versions of Xilinx's ISE. ISE 8.x is so bleeping big that it doen't fit on a CD - only on a DVD. HTH

-Dave Pollum

Reply to
vze24h5m

Thanks will look at it as the XC9500 looked close.

After umptten survey forms eventually managed to find the pages, will look at trying an older version shortly.

I think it has got to the predicted stage of

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Paul Carpenter          | paul@pcserviceselectronics.co.uk
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Paul Carpenter

months

It sounds very much like this project is being run backwards. Petty decisions like the size and medium for archiving are decided in advance, while real, important decisions like the tools and devices are left until later.

Reply to
David Brown

Maybe the spec should have been simplified to "a sufficiently large drive..." instead of specifiying it explicitly..! Or if it's more about approving specific devices, would "just use 2 of them" be an easier option...

Reply to
Mike Harrison

Hi Paul,

Not sure about the minefield, Actel's P&R is called Designer. The third party tools are Modelsim for simulation (same for ISE/Quartus/ispLever) and Synplicity for synthesis. All these tools are called/invoked from Libero which is their development environment. I have no experience with Libero but I understand that Libero gold is free and allow you to target devices up to a million "marketing gates". I only use Designer and although it is much slower than ISE/Quartus it is quite easy to use. See the link below for a simple design I implemented on their ProASIC+ prototype board,

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Regards, Hans.

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Reply to
Hans

That might work, just be carefull with driving true 5V devices from the CPLD. In fact, I am thinking about power switching an XC9536XL between

3.3V and 5V, to deal with the voltage translations. I have done it with an AVR, not sure it it will work with the XC9536XL yet.
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linnix

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