The ATMega48 data sheet says that a TWI slave can extend the period of the SCL signal produced by the TWI master :
> "The Slave can extend the SCL low period by pulling the SCL line low."
Does anyone know of the maximum time that the period can be extended by the TWI slave?
microseconds? milliseconds? seconds? some limiting factor?
Thanks.
-TH
snipped-for-privacy@yahoo.com pisze:
I2C doesn't limit this period. Slave can keep SCL low as long wants. However, this will stop whole communication over bus.
Best Regards AK
extend the period of
Many thanks for the quick response! I'll give it a whirl.
- TH
Silicon Labs includes a 25 millisecond timer for bus timeout in their SMBus hardware, but if you need that much time to ACK then I2C may not be the best choice. Jack Peacock
Have something to add? Share your thoughts — no account required.
Ask the community — no account required