electrical interface problem

Could someone please do me a favor and post something for me at Newsgroups: alt.binaries.schematics.electronic.

I think I found a solution myself but I am not sure whether it will work. I made a drawing and would like to discuss that but I'm not allowed to post at Newsgroups: alt.binaries.schematics.electronic.

Thanks, Mel

"Melanie Nasic" schrieb im Newsbeitrag news:dn92g0$r8v$ snipped-for-privacy@mamenchi.zrz.TU-Berlin.DE...

I think I found a solution to the post "electrical interface problem" but I am not sure whether it will work. I made a drawing and would like to discuss that but I'm not allowed to post at Newsgroups: alt.binaries.schematics.electronic. Could someone help me, please? I'm sorry for bothering you with this question but I'm out of ideas...

Best Regards,

Melanie Nasic

Email them to me, along with the thread title you want them labeled with.

Also make sure of the rigidity of the 1.15V receiver common-mode spec.

This sounds like LVDS. This number is what the LVDS _transmitter_ puts out. Most of the _receivers_ (Fairchild, for instance, some parts of which I've designed) can tolerate almost rail-to-rail input common-mode.

...Jim Thompson

John, would you please be so kind to post my message with the binaries?!

Thanks a lot.

Mel

"John P>> Could someone please do me a favor and post something for me at

Your message? Which one? And I haven't received the binary files from you, yet.

Please email whatever binary files you wish to be posted, to me, along with whatever text you want included, and I will post the whole thing on A.B.S.E for you.

Hi John,

I've send them to you yesterday along with my email. I did it again for 3 minutes, could you please check? Maybe your mail program thought of me like spam?! ;-)

Bye, Mel

"John P>> John, would you please be so kind to post my message with the binaries?!

Yes, they were in the trash. One of my filters caught them. Sorry.

Posted.

Hi,

I wonder what is the characteristic impedance of the circuit proposal CMLmystery.pdf? I think this is the easiest way to do it but I want to be sure that the CML transmitter still "sees" 50 Ohm line impedance. Any comments on that?

Bye, Mel.

"John P>> Hi John,

qrk/Mark implies that the transmitter can be operated with less output common mode (as I suspected), so just use my version without caps, use no divider to set output CM, just twiddle the pull-down R, as in Mark's version until you get the +1.15V at the receiver. (My values were line-match based.)

...Jim Thompson

Hi Jim,

don't the changes you suggest effect the line match (twiddling the pull-down Rs)? Nonetheless I would like to calculate the impedance of Mark's circuit. Any suggestions how I can find out about the impedance?

Bye Mel

"Jim Thompson" schrieb im Newsbeitrag news: snipped-for-privacy@4ax.com...

Oooops! In Mark's version they do affect impedance. Use a single midpoint pull-down... my divider without the upper resistor.

Insert transmission line into your drawing, then you can visualize source and termination easier.

...Jim Thompson

See posting in abse, "electrical interface problem - Melanie_attn.gif"

I'm not quite sure of your electronics knowledge, so I'll show the steps to finding the equivalent input impedance of the network. This will work for both mine and Jim's circuits since they are essentially the same.

Item 1, in Melanie_attn.gif, is the full network. R7 has no effect on the differential impedance. R7 is only to set the DC bias point for your receiver. In Jim's schematic (MelanieCML.pdf), the bias parts R8, R9, C3 have no effect on the differential impedance.

Item 2 shows the network without R7 since the node R7,R4,R5 is at zero AC potential.

Items 3, 4, and 5 show the step by step simplification of the network to get the equivalent input impedance of the network. The double bars (||) mean parallel, i.e. R1||Rb means R1 in parallel with Rb.

Your Rocket IO wants to drive an impedance of 100 Ohms differential, not 50 Ohms.

The difference between Jim Thompson's circuit and mine:

Jim thinks you need to add termination resistor at the input to the receiver (the pair of 49.9 Ohm resistors). Jim's circuit gives 17.6 dB attenuation which might be too much.

I think that the termination resistor is included on the receiver silicon die. That would be R6 in the schematic. My circuit gives 10.1 dB attenuation. I also use non-standard resistor values only because I'm too lazy to look up standard values. Boy, it's nice being unemployed and lazy!

Before this discussion goes on, we really need to know what your receiver device is. John Larkin brings up some valid points about simplification of the interface which could null this discussion of level shifting and attenuator pads.

Hi Mark,

thank you so much for your elaborations. Everything became pretty clear for me now. So I got approx 100 Ohm for the resistor network now. But as I want to transmit data in the Gigahertz range aren't I supposed to take a complex HF impedance value into account? Are there any further calculations I have to make to gain a conclusion whether this circuit will work for signals with data rates of 3 Gbps.

Regards, Melanie

"qrk" schrieb im Newsbeitrag news: snipped-for-privacy@4ax.com...

Yes, you need to consider complex impedances, or more likely how to minimize the reactive part. You don't say what sort of path your signal must travel between driver and receiver. If only a couple cm on the circuit board, this should be manageable with careful layout practices. If your signal goes through connectors, difficulties can arise. I suggest getting a copy of Howard Johnson's book, "High-Speed Digital Design: A Handbook of Black Magic" (ISBN: 0133957241). It has lots of practical information. Good WC reading. Your uni library may have a copy. Look for application notes on routing high-speed lines on printed circuit boards. You usually find these articles for 10 Gb/s I/O.

If you have access to simulation tools like Mentor's HyperLynx I would suggest learning how to use these tools. You can simulate your signal path and see what sort of problems you may run into. Xilinx has Mentor binary models of the output structure and packaging.

To model the differential impedance of the traces on your circuit board, you can use ATLC . It's a graphically instructive program, well worth looking at the results. Version 4.4.4 is compiled for Windows. It is a user unfriendly program, but free and multi-platform. There are other programs that calculate differential impedance like Polar's very expensive programs . Many printed circuit board manufacturing houses use the Polar programs. You can call your PCB fabricator and ask them for the trace dimensions. Once you know your PCB stackup, you can talk to your PCB fabricator. This is normal communication between the designer and fabricator when dealing with high-speed signals.