There's not much difference between them. The most significant is probably that the mega series has a hardware 8-bit MUL instruction which takes two clock cycles. I would not say that going from one series to the other necessitates any more modifications than going between parts in the same series.
In alt.engineering.electrical Anthony Fremont wrote: | jasen wrote: |> On 2007-03-16, Anthony Fremont wrote: |>> TT_Man wrote: |>>>> As you said, PIC is king and it is for a reason, they work. |>>>>
|>>> Only if you can get to grips with the appalling op code set..... OK |>>> if you can program in C , I suppose.I can't/won't |>>
|>> I only do assembler on the PIC too. What's wrong with the op-code |>> set? It's RISC, |>
|> no it's not, it has too few registers to qualify. | | By whose definition? It stands for Reduced Instruction Set. 35 | instructions is pretty reduced IMO.
I guess some people thought RISC meant Registers In Surplus Capacity.
|>> it has 35 instructions, it's not supposed to be luxurious. It's |>> supposed to be functional and fast....it succeeds. |>
|> It always seemed kind of awkward and slow slow to me. | | Compared to what? 10MIPs on a few mA is pretty good in my book.
I like that book.
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The 32Khz are you do that using the watchog and prescaler? 128KHz/4 or an external clock.
It looks like the internal RC can be pulled across an octave in 256 steps so getting within 0.5% of some multiple of 38400 should be possible.
yeah, it'd need an external clock if it wanted to do serial at standard rates and bit-bang the usb
someone was saying that the AVRs are standing still while the PICs are advancing, I'm not seeing that. the ATTiny2313 datasheet has 3 times as many pages as the AT90S2313, and it seems like it has three times the features too,
that part's been available for a while now but I see they are upgrading other parts to 20Mhz and I assume the other new 2313 fearures too
still binary and electically compatible with the at90s2313 AIUI. (except for parallel programming)
Quite often. Photography & audio work, just for two popular examples.
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Lionel wrote in news: snipped-for-privacy@4ax.com:
Agreed. SOme tasks like laser scanning might call for a small dedicated controller, and you'd certainly want 16 bits there, especially if colour mixing was needed.
Even a small task like lin/log conversion, which many on Usenet advise me was best solved by code, needs to use 16 bits for accuracy over a decent range. Unless more tiny micros are made with 16 bit ADC and DAC on board, people will always be agonising over expensive analog computation IC's. Far better that we have a small number of cheap standard parts we can learn to code for. If I knew I could have this, I'd put more effort into learning it. I don't want to do it with a 40 pin device that needs a diploma to learn either, I want to do it with a 4 pin IC and some very simple high level language.
The way things are now, even real experts have argued and floundered over what best to advise. If more small micros had 16 bit analog I/O built in, people like me wouldn't even have to ask.
If you need 16 bits, the additional chip is the least of your problem. The noise with D & A circuits on the same board will be so difficult to deal with, let alone on the same chip.
"linnix" wrote in news: snipped-for-privacy@p15g2000hsd.googlegroups.com:
Good point... Makes me wonder why I was so often told that the problem is best solved with code. Analog computation doesn't look so expensive, given the ease of handling the parts and signals.
What do you not understand about "Reduced Instruction Set Computer"? (A computer with a reduced instruction set???) A computer with about 30 instructions can be called a risc computer,as compared to the x86 group with about 500. Now if you want to claim that name for something else, you better explain that, because I think a lot of people dont agree with you.
I have more than a "passing familiarity" with computer architecture (nearly 30 years, so far), & I don't agree with you.
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You think? Feel free to post authoritative reference.
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Well, light meters for photographics work on a Log2 scale, so it requires more ADC resolution than you might expect at first glance. That said, a good sample & hold in front of a dual-slope converter would be perfectly suitable for most such purposes.
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If you'd actually read the whole post, you would've noticed that I've already posted a link to one reference. You can start there. Once you're done, you can check:
Be sure to let us all know if you manage to find a reference that agrees with your definition of 'RISC' as meaning: "Reduce Instruction Set Complexity", raher than "Reduced Instruction Set Computer".
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How about Carnegie Mellon University School of COmputer Science?
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"The most famous approach to these problems is called RISC, short for Reduced Instruction Set Complexity.
Or, University of Iowa Department of Computer Science
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"As a result, processors designed according to the RISC (reduced instruction set complexity) philosophy..."'
Berkley
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hesis.pdf
"A RISC (Reduced Instruction Set Complexity) processor, as used in most workstations today..."
Sun Microsystems:
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"Many architectures, notably reduced instruction set complexity (RISC) architectures such as the Scalable Processor Architecture (SPARC.TM.)..."
MIT Supertech.csail.mit.edu/papers=3Fkuszmaul.ps
"It has been widely argued that one cannot afford to put any new =3Facademic=3F mechanisms into state-of-the-art RISC microprocessors because of the billion-dollar investment that is put into such microprocessors. That billion-dollar investment, however, is indicative of the fact that the =3FReduced Instruction Set Complexity=3F designs have become very complex indeed."
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