Self-Clocking Data?

If you have a local clock oscillator 'phase locked' to the incoming data stream, that works too.

Graham

FyberOptic a =E9crit :

A self-clocking code contains regular level changes that can be used to synchronise a PLL to. The PLL output is the clock for the data. See here:

Thanks, Jenalee K.

Another interesting example is the digital audio SPDIF format ( also the AES/EBU professional version too ).

Graham

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AES/EBU

Yet another interesting example is 8B/10B encoding and 64B/65B encoding. An interesting point about overhead encoded channels is channel status and control can be sent in-band, called 'comma codes' in Fibre channel and ethernet, AFAIR and sometimes known as violation codes in earlier communications equipment.

The basic principle is simple: As a valid code is mapped to 256 of the

1024 possible codes (8 bit data in a 10 bit field), any code not in the map of 256 data codes is a control/status code.

Another place to look is at EFM (used in CDs) - Eight to Fourteen Modulation - maps 8 bit data into 14 bit fields.

Something to keep in mind with self clocking data is the notion of average DC and it's prevention.

Cheers

PeteS

There are all kinds of self clocking codes. Self clocking codes have at least one transistion for every bit cell. For example a "one" might be represented by a transition at the cell edge and another transition at the cell center while a "zero" would be represented by a transition at the cell edge only but not the center. In this way, every bit whether zero or one has a transition that can be used to synchronize a local clock. Long strings of zeros will not cause lack of sync as it can with non-clocking codes. That is a simple explanation, there are many variations on the theme. Bob

with MFM (as I understand it) a "0" is like 010 and a "1" is like 101

So, In the middle of the data stream for every bit there are two changes of value. those changes can be used to keep the clock synchronised.

PCs use special hardware that decodes the data and writes it into the memory. the Commodore Amiga used less-specialised hardware and did the decoding using the CPU, I think a 12MHz machine was needed to read HD floppies. \\ Bye. Jasen

Only some codes do this - Manchester encoding in particular. A more general statement is that the average number of line transitions per unit time is directly related to the data rate - it may be 1/2 (the most common), 1/4 or whatever one desires. What matters is there is a periodic signal at some known rate and it's relationship to the data rate is known. Of course there's run length issues between transitions, but that's related to PLL lock requirements (shorter run lengths permit a faster PLL loop).

Cheers

PeteS

For example a "one" might be

Actually the clock and data streams are embedded in a single stream.

Imagine a 50% duty cycle square wave high low high low etc ...

Now take one low-high sequence and modify it to have 67% low, 33% high instead of 50-50. This will be '0'

Modify another one to have 33% low, 67% high, this will be '1'.

You now have two events marked as '1' and '0' which can be used to create a data stream, the falling edges will give you the frequency, and the low/high ratio the bit values.

This encoding is used in some infra red television remotes.

vic

Maybe it's your military bearing that makes you prone to giving out with these bluff statements. It might be quite interesting to measure.

Cheers, Phil Hobbs Um, buy her book? John hi im azeem from dubai my profession is techinician i need a circuit diagram for vcd player dvd player the model no is prs 603 and prs 699 can give me some explanation about this and how P-channel mosfet works in general.