Hi John,
John Fields inscribed thus:
Best Regards:
Baron.
Random timer!
May 31, 2007
30 Replies
Hi Jason,
Jasen inscribed thus:
Can you confirm the resistor value between pin 2 and 7 please ! I read it as 33 Ohms ?
Best Regards:
Baron.
Hi Bob,
Bob Masta inscribed thus:
Right lets see if I've got this right !
I've breadboarded the 555 timer circuit from Jason. This is the clock input to a SN74194 via an AND gate. The outputs are OR'ed so that if any one is high the output is high. This output starts the counter when it goes low.
The 555 goes fast incrementing the 74194 until the button is pressed. When this happens the 555 runs slow and the 74194 is decremented. When the 74194 hits all zeros the OR'ed output starts the counter, turns on a light and gates off the 555 output.
Pressing the second button resets everything.
I hope that it makes sense ! It does to me now that I realised that the random element was the time between button presses !
Best Regards:
Baron.
I think you\'ve still got it wrong. Consider:
Using Jasen\'s method, at startup the 555 will be oscillating at,
say, 1000 Hz and it\'ll be clocking a free-running 4 bit binary
counter (not a shift register) so that its outputs change every
millisecond. That\'s fast enough that a random number between 0 and
15, inclusive, will be captured when the start button is pressed.
Now, when the START button is pressed, the 555\'s speed will be
changed to 1Hz and the counter\'s TERMINAL COUNT (TC) output will be
connected to the counter\'s ENABLE input so that when the counter
gets to 1111 it\'ll freeze.
When that happens, the 555\'s speed will be changed back to 1000Hz,
the lamp will light, and the reaction time counter will be enabled,
allowing it to accumulate 1000Hz clocks until the STOP button is
pressed. At that time the reaction time counter will be stopped and
its output frozen.
The 555 will be allowed to remain oscillating at 1000 Hz, however,
and the 4 bit binary delay counter will once again start
free-running until the START button is pressed, renewing the cycle.
Want a schematic?
John Fields inscribed thus:
Yes please. By the way I sent a mail to you at the address in the from line. Hope thats Ok.
Best Regards:
Baron.
that 555 circuit was my original suggestion, at the time I wasn't aware of a need for an an the delay to be a whole number of seconds... (I still haven't seen a requirement for that)
Bye. Jasen
that's right the LM555 has a maximum current into the discharge pin of 200mA, (and the CMOS version TLC555 or 7555 only 100ma)
33ohms is enough to keep the peak discharge current to a sensible value with a 5V supply the capacitor will charge to 3.33V so the peak dischharge current will be about 100mABye. Jasen
Jasen inscribed thus:
There isn't ! I am just feeding a shift register which gives 1, 2, 4,
8, outputs. OR'ed together gives a high out while the count is not zero. Stepping the register backwards with a 1 second clock causes the OR'ed output to go low when zero is reached.Your 555 dual speed clock works as advertised.
Thankyou.
Best Regards:
Baron.
Yes, that\'s fine.
I just emailed you the schematic and also posted it to abse in case
anyone else is interested. If you have any questions about how it
works, please post them here instead of emailing them to me so that
the discussion will remain public.
John Fields inscribed thus:
Hi John. I don't know if there is a problem or not with the mail ? I haven't received anything from you yet ! Thanks.
Best Regards:
Baron.
Oops... I got your address wrong.
It\'s on its way again. :-)
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