Inverter H bridge question

Have you tried looking at the current through the mosfets? Or the gate-source voltage? Or the frequency vs the RC constant of the circuit?

Inverter? an inverter converts dc to ac?

I corrected the issue somewhat by replacing MOSFETs with BJTs. The H bridge output is now in the Volts range as compared to milliVolts. I have added some small inductors and Darlington pairs also. Could someone point me to a good SPICE transformer model ? Thanks in advance.

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Post your circuit.

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Post your circuit.

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Yup!

http://en.wikipedia.org/wiki/Inverter_(electrical)

Yes. One supposes that it derives from a function that is the inverse of a rectifier.

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Rich Webb     Norfolk, VA

On Sep 28, 7:21=A0am, John Fields wrote:

I have added the SPICE netlist below. I am using a standard op-amp LMH6629. The modelcard files are added after the main file. I am using ngspice-23 on a Fedora 14 machine running GCC 4.5.1 Please note that the circuit is still experimental, and so not optimized or efficient.

Test H Bridge

.INCLUDE modelcardold.nmos .INCLUDE modelcardold.pmos

*

• PINOUT ORDER +IN -IN +V -V OUT COMP

• PINOUT ORDER 4 3 8 5 7 6 .SUBCKT LMH6629 4 3 8 5 7 6

*

• SEE BELOW FOR MODEL PROGRAMMING, NOTES AND FEATURES

*

• THE LINES BELOW ALLOW THE MODEL TO BE SET UP FOR

• DIFFERENT SUPPLY VOLTAGES.

• TO PROGRAM FOR SUPPLY VOLTAGE, COMMENT OUT THE GROUP

• OF STATEMENTS YOU DO NOT WANT TO USE. THE DEFAULT

• BELOW IS for 5 VOLT OPERATION.

* *

• 5.0 VOLT GROUP

• OFFSET V78 60 50 71E-6

• SLEW R392 44 46 6E3 R422 44 35 675

• BANDWIDTH C53 35 42 1.10E-12 C61 35 20 0.60E-12

• END 5.0 VOLT GROUP

• 3.3 VOLT GROUP

• OFFSET

*V78 60 50 97E-6

• SLEW

*R392 44 46 12E3 *R422 44 35 675

• BANDWIDTH

*C53 35 42 1.20E-12 *C61 35 20 0.63E-12

• END 3.3 VOLT GROUP

*

• END MODEL PROGRAMMING

• BEGIN MODEL NOTES

• COMP PIN:

• THE COMP MODE PIN HAS A THRESHOLD OF 1.4 VOLTS.

• FOR MODE ZERO (LO), PULL BELOW THRESHOLD OR LEAVE OPEN.

• FOR MODE ONE (HI), PULL ABOVE THRESHOLD

• BUT DO NOT EXCEED VCC. NOTE THAT WHEN COMP PIN

• IS LEFT FLOATING, IT MAY READ A VOLTAGE HIGHER THAN V+,

• BUT THE MODEL BEHAVES ACCORDING TO THE DEFAULT

• STATE WHICH IS COMP LO WHEN LEFT FLOATING.

• SOT23-5 EMULATION:

• SOT23-5 PACKAGE CAN BE EMULATED BY TYING THE COMP

• PIN HIGH.

• END MODEL NOTES

• Q36 5 9 10 QOP Q37 8 11 10 QON D37 7 8 DD D38 5 7 DD D39 12 0 DIN D40 13 0 DIN I24 0 12 0.1E-3 I25 0 13 0.1E-3 E99 14 0 5 0 1 E100 15 0 8 0 1 D41 16 0 DVN D42 17 0 DVN I26 0 16 3E-3 I27 0 17 3E-3 E101 18 3 16 17 3.65E-2 G23 4 18 12 13 8.73E-5 R381 5 8 1400 E102 19 0 15 20 1 E103 21 0 14 20 1 E104 22 0 23 0 1 R382 19 24 1E4 R383 21 25 1E4 R384 22 26 1E4 R385 0 24 0.1 R386 0 25 0.1 R387 0 26 0.1 E105 27 4 26 0 1.8 R388 28 23 10 R389 23 29 10 C48 19 24 3E-12 C49 21 25 3E-12 C50 22 26 115E-12 E106 30 27 25 0 0.05 E107 31 30 24 0 -0.1 Q38 14 32 11 QDP Q39 15 32 9 QDN I28 8 5 11.7E-3 I29 15 11 7.7E-4 I30 9 14 7.7E-4 R390 20 33 10 R391 20 32 10 C51 33 20 8E-12 C52 32 20 2.5E-12 E108 34 35 36 0 1 E109 35 37 36 0 1 E110 38 20 35 20 1 D43 39 15 DD D44 14 40 DD V73 37 40 1.35 V74 39 34 1.34 I31 0 41 1E-3 D45 41 0 DD V75 36 41 -0.6551 D46 43 44 DD D47 44 45 DD R393 0 44 4.5E5 C54 18 0 0.85E-12 C55 31 0 0.85E-12 R394 10 47 0.25 G24 33 20 35 20 0.1 G25 32 20 33 20 0.1 L3 47 7 0.25E-9 R395 47 7 100 E111 43 38 36 0 2 E112 45 38 36 0 -2 C56 18 31 0.45E-12 G26 44 0 48 49 -6E-3 Q40 48 50 51 QIP Q41 49 31 52 QIP R397 51 53 0.1 R398 52 53 0.1 Q42 54 55 56 QIP Q43 55 55 56 QIP R399 57 48 50 R400 57 49 50 V76 54 53 0 V77 57 14 -0.3 C58 48 49 1E-13 D48 50 58 DIC D49 31 58 DIC E113 29 0 4 59 1 E114 28 0 18 59 1 C59 7 0 0.1P R401 35 34 1E9 R402 37 35 1E9 R403 3 18 1E9 R404 4 27 1E9 R405 27 30 1E9 R406 30 31 1E9 R407 38 45 1E9 R408 38 43 1E9 G27 4 18 61 62 3.3E-4 R410 0 62 1E3 R411 0 62 1E3 R412 0 61 1E3 R413 0 61 1E3 E116 63 42 64 0 30 E117 65 0 64 0 -30 V79 66 65 15 V80 67 63 -15 R414 63 42 1E18 R415 65 0 1E18 M61 0 67 42 68 PSW L=3D1.5U W=3D150U M62 42 66 0 69 NSW L=3D1.5U W=3D150U R416 68 0 1E12 R417 69 0 1E12 E118 70 46 71 0 30 E119 72 35 71 0 -30 V81 73 72 15 V82 74 70 -15 R418 70 46 1E18 R419 72 35 1E18 M63 35 74 46 75 PSW L=3D1.5U W=3D150U M64 46 73 35 76 NSW L=3D1.5U W=3D150U R420 75 0 1E12 R421 76 0 1E12 E120 77 0 64 0 -1 V84 71 77 1 R423 0 77 1E12 R424 0 77 1E12 R425 0 71 1E12 E121 18 60 36 0 276E-6 V85 15 78 1.65 V86 15 56 -1 D50 79 31 DIC D51 79 50 DIC V87 80 14 0.275 E122 78 58 36 0 1.1 E123 79 80 36 0 1.1 E124 20 14 15 14 0.7 R427 0 20 1E12 V88 81 0 1 E125 82 81 36 0 -2 G28 55 14 82 0 5.25E-3 G29 8 5 36 0 -5E-3 Q44 83 84 85 QSW R430 83 15 100E3 I32 15 86 10E-6 Q45 87 88 85 QSW Q46 85 86 14 QSW Q47 86 86 14 QSW R431 87 15 100E3 E126 89 0 83 87 1 R432 0 89 200E3 R433 14 84 1E6 M65 64 89 0 0 NEN L=3D1.5U W=3D1500U R434 64 90 50E3 V91 90 0 1 C63 83 87 35E-15 R435 6 84 1 C64 84 14 2E-12 C65 6 14 1E-12 C66 64 0 65E-15 I33 15 84 22E-6 V93 88 14 1.4 R436 0 81 1E9 R437 0 78 1E9 R438 0 36 1E9 R439 80 79 1E9 R440 0 82 1E9 R441 60 18 1E9 E127 59 14 15 14 0.7 R442 0 59 1E12 R443 0 59 1E12 .MODEL QDP PNP .MODEL QDN NPN .MODEL QON NPN VAF=3D150 BF=3D420 IKF=3D1.5 RE=3D0.5 RC=3D1 .MODEL QOP PNP VAF=3D150 BF=3D420 IKF=3D1.5 RE=3D0.5 RC=3D1 .MODEL QIP PNP VAF=3D150 BF=3D260 IKF=3D0.005 RB=3D1.4 RE=3D0.1 RC=3D1 .MODEL DVN D KF=3D4E-13 .MODEL DIN D KF=3D26E-14 .MODEL DIC D RS=3D0.1 .MODEL DD D .MODEL PSW PMOS KP=3D200U VTO=3D-7.5 IS=3D1E-18 .MODEL NSW NMOS KP=3D200U VTO=3D7.5 IS=3D1E-18 .MODEL QSW NPN .MODEL NEN NMOS KP=3D200U VTO=3D0.5 IS=3D1E-18 .ENDS

• END MODEL LMH6629

.MODEL BFP420 NPN(LEVEL=3D1 IS=3D0.20045E-18A VAF=3D28.383V NE=3D2.0518 VAR=3D19.705 NC=3D1.1724 RBM=3D8.5757 CJE=3D1.8063E-15F TF=3D6.7661E-12s ITF=3D1.0E-3A VJC=3D0.81969V TR=3D2.3249E-9s MJS=3D0 XTI=3D3 BF=3D72.534 IKF=3D0.48731A BR=3D7.8287 IKR=3D0.69141A RB=3D3.4849 RE=3D0.31111 VJE=3D0.=

8051V PTF=3D0 MJC=3D0.30232 CJS=3D0F XTB=3D0 FC=3D0.73234 NF=3D1.2432 ISE=3D19.04= 9E-19A NR=3D1.3325 ISC=3D0.019237A IRB=3D0.72983E-3A RC=3D0.10105 MJE=3D0.46576 VTF=3D0.23794V CJC=3D234.53E-15F XCJC=3D0.3 VJS=3D0.75V EG=3D1.11V TNOM=3D3= 00K)

.SUBCKT RCF 1 2

• 1 IN

• 2 OUT C0 2 0 17.0uF R0 1 2 1.0K .ENDS

.SUBCKT DARLINGTON 1 2 3

• 1 VCC

• 2 IN

• 3 OUT Q0 1 2 4 BFP420 Q1 1 4 3 BFP420 .ENDS

.SUBCKT INV 1 2 3

• 1 VDD

• 2 IN

• 3 OUT M0 3 2 1 1 M_PMOS L=3D1.2u W=3D1.2u M1 3 2 0 0 M_NMOS L=3D1.2u W=3D3.5u .ENDS

.SUBCKT HBRG 1 2 3 4 5

• 1 VDD

• 2 PWR +

• 3 TRG

• 4 OUT 1

• 5 OUT 2

*M0 2 3 4 4 M_PMOS L=3D1.2u W=3D1.5u *M1 4 7 0 0 M_NMOS L=3D1.2u W=3D4.5u *M2 2 6 5 5 M_PMOS L=3D1.2u W=3D1.5u *M3 5 8 0 0 M_NMOS L=3D1.2u W=3D4.5u Q0 2 3 4 BFP420 Q1 4 7 0 BFP420 Q2 2 6 5 BFP420 Q3 5 8 0 BFP420 XIN0 1 3 6 INV XIN1 1 3 7 INV XIN2 1 6 8 INV .ENDS

.SUBCKT TXFRMRCT 1 2 3 4 5

• 1 In1

• 2 In2

• 3 Out 1

• 4 Out 2

• 5 Center L1 6 2 1nH L2 3 5 0.025nH L3 5 4 0.025nH k1 L1 L2 0.999 k2 L2 L3 0.999 k3 L1 L3 0.999 R0 1 6 1E-3 R1 4 0 1e15 .ENDS TXFRMRCT

VP 1 0 DC 5.0 VM 2 0 DC -5.0 VB 3 0 DC 1.0 VSIG 4 0 DC 0.0 SIN(0, 5.0V, 60, 0, 0, 0) VPWRP 5 0 DC 5.0 VTP0 12 14 DC 0.0 VTP1 13 15 DC 0.0

L0 8 10 100.0uH L1 9 11 100.0uH XD0 5 10 12 DARLINGTON XD1 5 11 13 DARLINGTON XHBRG0 1 5 7 8 9 HBRG XLM0 4 0 1 2 7 3 LMH6629

*XRC0 12 14 RCF *XRC1 13 15 RCF

.OPTIONS NOPAGE .IC V(7)=3D0.0 V(8)=3D0.0 V(9)=3D0.0

• V(10)=3D0.0 V(11)=3D0.0 V(12)=3D0.0

• V(13)=3D0.0 ;V(14)=3D0.0 V(15)=3D0.0

*+ V(16)=3D0.0 V(17)=3D0.0 .PROBE .TRAN 500US 200MS 400US UIC .PRINT TRAN V(8,9) V(10,11) V(12,13) *.PRINT TRAN I(VTP0) I(VTP1) .END

model card files: .MODEL M_NMOS NMOS LEVEL=3D3

+PHI=3D0.600000 +TOX=3D2.1200E-08 +XJ=3D0.200000U +TPG=3D1 +VTO=3D0.7860 +DELTA=3D6.9670E-01 +LD=3D1.6470E-07 +KP=3D9.6379E-05 +UO=3D591.7 +THETA=3D8.1220E-02 +RSH=3D8.5450E+01 +GAMMA=3D0.5863 +NSUB=3D2.7470E+16 +NFS=3D1.98E+12 +VMAX=3D1.7330E+05 +ETA=3D4.3680E-02 +KAPPA=3D1.3960E-01 +CGDO=3D4.0241E-10 +CGSO=3D4.0241E-10 +CGBO=3D3.6144E-10 +CJ=3D3.8541E-04 +MJ=3D1.1854 +CJSW=3D1.3940E-10 +MJSW=3D0.125195 +PB=3D0.800000

.MODEL M_PMOS PMOS LEVEL=3D3

+PHI=3D0.600000 +TOX=3D2.1500E-08 +XJ=3D0.200000U +TPG=3D-1 +VTO=3D-0.9403 +DELTA=3D8.5790E-01 +LD=3D1.1650E-09 +KP=3D3.4276E-05 +UO=3D214.4 +THETA=3D1.4010E-01 +RSH=3D122.2 +GAMMA=3D0.5615 +NSUB=3D2.4270E+16 +NFS=3D3.46E+12 +VMAX=3D3.9310E+05 +ETA=3D1.5670E-01 +KAPPA=3D9.9990E+00 +CGDO=3D2.7937E-12 +CGSO=3D2.7937E-12 +CGBO=3D3.5981E-10 +CJ=3D4.5952E-04 +MJ=3D0.4845 +CJSW=3D2.7917E-10 +MJSW=3D0.365250 +PB=3D0.850000

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Sorry, I thought you were running LTspice.

Thanks for the reply, though.

Isn't spice, pretty much, spice? Just to satisfy my morbid curiosity, what happens when you run Daku's netlist through your LTSpice?

(I haven't yet been able to figure out how to operate LTspice or any linux versions of it.)

Thanks, Rich

I have added the SPICE netlist below. I am using a standard op-amp LMH6629. The modelcard files are added after the main file. I am using ngspice-23 on a Fedora 14 machine running GCC 4.5.1 Please note that the circuit is still experimental, and so not optimized or efficient.

*M0 2 3 4 4 M_PMOS L=1.2u W=1.5u *M1 4 7 0 0 M_NMOS L=1.2u W=4.5u *M2 2 6 5 5 M_PMOS L=1.2u W=1.5u *M3 5 8 0 0 M_NMOS L=1.2u W=4.5u

Hello Daku,

Your Mosfets are too weak. They only have Idmax=2mA. The ratio W/L for Power-Mosfet is more like 10000 to 100000. This means W should be many m (milli) instead of u.

Example: M1 4 7 0 0 M_NMOS L=1.2u W=50m

Best regards, Helmut

Lots of people (including me) run run ltspice on linux using wine. it's easy to install and runs well (somewhat dependant on window manager settings). The provider (linear technology) is biased towards their own parts. One advantage is the ASCII netlists produced by this GUI application are easily posted on usenet. And thus easily run and understood.

In addition to wine you need to also install "xchm" if you want to use the online help.

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