Which chip familly for 100Mhz counter?

I don't know quite where the frequency cross-over point is now with "TinyLogic" parts, but CMOS may actually draw more power than (P)ECL at high frequencies.

In my monolithic world, with no external loads, PECL beats CMOS above about 300MHz.

...Jim Thompson

--
|  James E.Thompson, P.E.                           |    mens     |
|  Analog Innovations, Inc.                         |     et      |
|  Analog/Mixed-Signal ASIC\'s and Discrete Systems  |    manus    |
|  Phoenix, Arizona            Voice:(480)460-2350  |             |
|  E-mail Address at Website     Fax:(480)460-2142  |  Brass Rat  |
|       http://www.analog-innovations.com           |    1962     |
             
I love to cook with wine.      Sometimes I even put it in the food.
Reply to
Jim Thompson
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Not at 2.2GHz it's not ;-)

...Jim Thompson

--
|  James E.Thompson, P.E.                           |    mens     |
|  Analog Innovations, Inc.                         |     et      |
|  Analog/Mixed-Signal ASIC\'s and Discrete Systems  |    manus    |
|  Phoenix, Arizona            Voice:(480)460-2350  |             |
|  E-mail Address at Website     Fax:(480)460-2142  |  Brass Rat  |
|       http://www.analog-innovations.com           |    1962     |
             
I love to cook with wine.      Sometimes I even put it in the food.
Reply to
Jim Thompson

Hi,

I would like, as part of a larger system, to implement a 32bit synchronous binary counter. Clock frequency will exceed 100Mhz (200 would be nice)

Any hints as to which chip familly would suit??

Thanks

John

Reply to
John Mitchell

You will have to come up with some scheme for fast carry generation. You can't let it propagate through, say, 8 four bit counters. I think there are CPLDs that will go fast enough.

Tam

Reply to
Tam/WB2TT

ECL ? it is only the first couples of FF there are critical...

You could maybe think of an CPLD to do some of the work...

Kasper

Reply to
Repzak

nope (to the first stages) - synchroneous is the keyword. It is the carry that makes problems. ECL definietly does it. But there isn't much beyond an 8bit counter in a case.

While 100MHz synchroneous 32bit is not that difficult to achieve with say an ACEX 1k , 200MHz becomes difficult. Nowadays, I guess a cyclone will do it. A 20$ part.

Rene

--
Ing.Buero R.Tschaggelar - http://www.ibrtses.com
& commercial newsgroups - http://www.talkto.net
Reply to
Rene Tschaggelar

Hello John,

If you don't want to use programmable logic you could employ ordinary HC logic but make the first FF a fast one. I believe the 74LVC2G74 is spec'd around 140MHz clock rate at 5V supply and it doesn't even cost a quarter. You can go higher than that but then you'd either have to use lower voltage chips or build a discrete first section. TI offers lots of fast LV logic in case you want to go that route.

Regards, Joerg

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Reply to
Joerg

Hello Jim,

All I could see in the LVC2G74 data sheet was the power dissipation capacitance, 40pF at 5V. I had underestimated the chip since it can clock a whopping 200MHz at 5V. Pretty cool for that small price.

In a counter the dissipation is often guided more by the quiescent current. It only draws a lot while there is an input signal in the high frequency range. Even then only the first few registers burn power while the others stay cool.

ECL is nice but it seems that it is gradually being pushed aside by fast LV logic.

Regards, Joerg

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Reply to
Joerg

Hello Jim,

Ok, one for you ;-)

Regards, Joerg

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Reply to
Joerg

It advanced a bit too. There is this 8bit synchroneous counter MC100EP016A, doing 1400MHz, then the MC100E137, an 8 bit ripple counter doing 2200MHz, just to name two.

Rene

--
Ing.Buero R.Tschaggelar - http://www.ibrtses.com
& commercial newsgroups - http://www.talkto.net
Reply to
Rene Tschaggelar

There is a standard carry propagation scheme for fast synchronous counters, usually shown somewhere in the data sheet, which gives the same performance for two or more than two integrated circuits - the chips have two count enable inputs, and one is driven by the first IC in the stack while the other is daisy-chained.

A couple of the years ago the MC100E016 8-bit counter chip could be guaranteed to count at 500MHz when stacked up in this way to make 16-,

24- or 32-bit counters. After that you might have to start worrying about fan-out. More recent ECLinPS parts (referred to elsewhere in this thread) can go faster.

---------- Bill Sloman, Nijmegen

Reply to
bill.sloman

Spartan2E

John

Reply to
John Larkin

And the power-speed product is?

...Jim Thompson

--
|  James E.Thompson, P.E.                           |    mens     |
|  Analog Innovations, Inc.                         |     et      |
|  Analog/Mixed-Signal ASIC\'s and Discrete Systems  |    manus    |
|  Phoenix, Arizona            Voice:(480)460-2350  |             |
|  E-mail Address at Website     Fax:(480)460-2142  |  Brass Rat  |
|       http://www.analog-innovations.com           |    1962     |
             
I love to cook with wine.      Sometimes I even put it in the food.
Reply to
Jim Thompson

Gang up the 8-bit counters with look-ahead carrys. A 32 bit 100MHz counter should be trivial these days. It would be in an FPGA, anyway.

Even 200MHz shouldn't be a big deal in an FPGA (never used CPLDs). I believe Xilinx' app people are over 500MHz for such things.

--
  Keith
Reply to
keith

Well, we're just shy of 3GHz (a few parts even above that ;) with CMOS. Stuff a little more complicated than counters too. The NRE is a tad on the expensive side though. ;-)

--
  Keith
Reply to
keith

Dunno, actually. I should look it up, but I'm off until the 11th. ;-) There's about 350M of the little buggars in there getting mighty hot and bothered though. The real problem these days is leakage. :-(

--
   Keith
Reply to
keith

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