Trying to understand comparators in ADCs

The comparator is the least of your problems.

is fast enough for most applications, and less likely to oscillate than most - though do read the application notes carefully. Any comparator will oscillate if you don't treat it carefully, and some of the crankier ones can be hard to stabilise.

In a dual slope converter it should not matter at what voltage the comparator switches as long as it does not change between slopes. Slow drifts that occur with temperature or time are ignored. Stability on the milli-second timescale is what is needed. This means that comparator input noise is something to think about - but in my experience that is not a spec you will see in datasheets perhaps because definitions of what is comparator noise and how to measure it vary between manufacturers.

piglet

What sort of pulse widths are involved?

We had a customer requirement to measure the energy (integrated pulse area) of some sub-us pulses. The customer wanted to use an analog integrator, but we convinced them to let us digitize the signal and do the integration numerically, in an FPGA. We used a 250 Ms/s, 12-bit dac. It works great. We can baseline auto-zero between pulses and we don't have to worry about capacitor or switch quality or charge injection. The customer has gradually added other measurements, including actual waveform acquisition.

"John Larkin" ha scritto nel messaggio news: snipped-for-privacy@4ax.com...

Thank you John and thanks to everyone that spent time answering,or just reading my question. Please,assume that i'm not a senior engineer ,that i have more doubt than certainties,and that my English has to be kept very simple.

I could say that what i need is not very different from the case you talked about.

Also I have to measure the energy,in form of total current consumption ,reading from a sense resistor a voltage proportional to that current. This current can widely vary in amplitude,width and intervals

When the circuit sleeps it absorbs say 1uA for seconds,if some events happens the current could rise quickly to tens mA,until 150 mA,for milliseconds ,or tens of miliseconds. The test interval could be many minutes long.

Digitizing it does not look so easy, if @ 1uA 4bits are enough then i need 22bit @150ma. The ADC should be fast enough to acquire rapid variations,it would be ok if i loose a couple of us when the current to measure has a ripid peak ,because of the duration of milliseconds of the peak value the error would be 1% or less,but a 24 bit fast ADC has a remarkable cost(i admit that in a jig it is not a big problem) Furthermore all this amount of data would need ,if not an FPGA,a fast microcontroller to integrate it at hudred of KHz rate.

These are the reason that,by now,are orienting me in the analog integrator direction, but i'm ready to change my mind

Thanks again

Diego

One advantage of the ADC is that you can oversample and sum a lot of samples, which improves the dynamic range.

If you need 22 bit equivalent resolution, that will be hard to do, no matter how you do it. Practically impossible.

You could use something nonlinear, to trade accuracy for dynamic range. Or have two sense resistors, big and small, and integrate or digitize both of them. 22 bits then becomes two 12-bit measurements, which is practical.

Gotta cook brownies now.