this is getting crazy

BOARD STATISTICS REPORT -- 22D470A_5_1.pcb -- Fri Aug 12 10:44:09 2005

Job Design Time: 22:20

Part Types: 52 Parts TopSide: 1043 BottomSide: 7 Total: 1050 Drilled pads: 227 Undrilled pads: 4332 Total: 4559 Via Name : STANDARDVIA Via Count : 2372 Via Name : POWERVIA Via Count : 35 Signal Nets: 956 Connections Routed: 2222 Partially 546 Unrouted: 48 Total: 2816

Plane Nets: 1 Connections Routed: 23 Partially 329 Unrouted: 37 Total: 389

Routed Connection Length (inches) X: 1184.27 Y: 1082.30 Total:

2266.57 Unrouted Connection Length (inches) X: 997.46 Y: 1104.17 Total: 2101.63

Number of copper clearance errors: 0

Number of Routing Layers: 6 Size of Board (square inches): 58.79 Equivalent IC count (1-IC/14 pins): 325.64 Board Density(boardsize/14pin-components): 0.18

John

Reply to
John Larkin
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I'm not sure what PADS means by that. It's probably hh:mm, but we have about 3 weeks in it so far, so maybe it restarts the clock every time we do a SAVE AS iteration, or something.

What scares me is the 1000+ parts on one board.

John

Reply to
John Larkin

Yeah, ain't life grand.

My board is a bit smaller, VME Eurocard at 6.4 x 9.2 inches, but it's interesting that our equivalent component densities are almost identical, 0.18 versus 0.20. We have three TSOPs (uP and two Xilinx's) and jillions of tiny analog things and 0603 parts. It's a 16-channel isolated-output DAC, basicly. 16 relays, too!

I'm luck to have some *really* good people in-house who assemble protos and moderate production runs, and we confer with them during design to make sure they'll be happy building the beasts.

See pic in a.b.s.e. Hey, show us yours!

John

Reply to
John Larkin

Ditto. Lots of planes pass through San Francisco.

John

Reply to
John Larkin

Most of the ones I do are 75-300 parts.

I'd have been tempted to add one relatively pointless unstuffed footprint to the 1,999 one to bring it up to an even 2,000. ;-)

Best regards, Spehro Pefhany

--
"it\'s the network..."                          "The Journey is the reward"
speff@interlog.com             Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog  Info for designers:  http://www.speff.com
Reply to
Spehro Pefhany

Hello Martin,

Now imagine this one, true story: We were doing layout in the 80's on a large mainframe. During the 23rd hour a snow storm was beginning to brew. It became spooky outside. Then I could see large 100kV lines in the distance swing back and forth, screamed "backup" and a few minutes later those same lines touched with an impressive arc. Poof, no more power. After 2-3 hours the air inside became unbearable and we all went home. The next afternoon we had power again but the backup files wouldn't read correctly and we were back to square one :-(

Regards, Joerg

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Reply to
Joerg

No more than any other point.

--
  Keith
Reply to
keith

is that 22mins 20 seconds?

(sorry)

martin

Reply to
martin griffith

Hello Terry,

Man, you guys do large boards. A couple of minutes ago I checked off on the Gerbers of my last one. Under 200 parts :-(

Regards, Joerg

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Reply to
Joerg

There are rarely too many test points or ground lugs.

--
 Thanks,
    - Win
Reply to
Winfield Hill

I like to plop a bunch of grounded thru-holes around my boards. We insert a few 2-56 screws from below, with nuts on top, as scope ground clip targets.

And right, the test point you really need is seldom there!

*Always* put test points on all chip selects!

John

Reply to
John Larkin

I did one board that has a comparator, two diodes, and two resistors. The whole board solders onto an SO-8 footprint.

John

Reply to
John Larkin

No more than Hattiesburg, Mississippi?

John

Reply to
John Larkin

On Sat, 13 Aug 2005 14:00:12 +1200, in sci.electronics.design Terry Given wrote: snip

then try this,

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martin

Reply to
martin griffith

Here's one (my layout) I just got back from the contract mfg yesterday:

Size Of board 16.41 x 11.148 sq in Equivalent 14 pin components 0.58 sq in/14 pin component Components on board 1335

Layer Route Pads Tracks Fills Arcs Text

------------------------------------------------------------------------ TopLayer 4426 119444 0 6524 0 MidLayer1 0 48348 0 1579 0 MidLayer2 0 89060 0 3907 0 BottomLayer 0 112866 0 8426 0 Mech1 Board Outlin 0 4264 0 0 0 Mech2 CreativeLab 0 222 0 525 63 Mech3 PCB Fab note 0 228 0 2 96 Mech4 CreativeLab 0 961 0 525 4 Mech5 Misc Working 0 2 0 7 0 Mech6 Redundant Ke 0 0 0 105 0 Mech7 Power Plane 0 8 0 0 0 Mech8 3V Power Pla 0 166 0 0 0 Mech9 Dimensioned 0 175 0 5 43 TopOverlay 0 7370 0 367 2675 TopSolder 0 6 1 2 0 KeepOutLayer 0 25 0 12 0 DrillDrawing 0 0 0 0 1 MultiLayer 26 0 0 0 0

------------------------------------------------------------------------ Total 4452 383145 1 21986 2882

Layer Pair Vias

---------------------------------------- Top Layer - Bottom Layer 1857

---------------------------------------- Total 1857

Routing Information

---------------------------------- Routing completion : 100.00% Connections : 3507 Connections routed : 3507 Connections remaining : 0

----------------------------------

But this one is better (my Tech's layout):

Size Of board 13.383 x 9.769 sq in Equivalent 14 pin components 0.20 sq in/14 pin component Components on board 1999

Layer Route Pads Tracks Fills Arcs Text

------------------------------------------------------------------------ TopLayer 8368 38529 0 621 4 MidLayer1 0 95941 0 4689 0 MidLayer2 0 14324 0 0 0 BottomLayer 0 101614 0 6890 0 Mechanical1 0 52298 0 16 22 Mechanical2 0 4 0 0 1 Mechanical3 0 4 0 0 2 EMI seal knife-edg 0 0 41 0 0 TopOverlay 0 7681 1 969 3194 BottomOverlay 0 43632 0 0 1260 TopPaste 0 0 310 0 0 TopSolder 0 4 0 0 0 KeepOutLayer 0 31 0 8 2 DrillDrawing 0 23 0 8 18 MultiLayer 942 0 0 0 0

------------------------------------------------------------------------ Total 9310 354085 352 13201 4503

Layer Pair Vias

---------------------------------------- Top Layer - Bottom Layer 3358

---------------------------------------- Total 3358

Routing Information

---------------------------------- Routing completion : 100.00% Connections : 6713 Connections routed : 6713 Connections remaining : 0

----------------------------------

That last PCB was laid out twice in a row. It had 1567 smt and 432 thru-hole parts, and from the outset we worked with the mfg to ascertain the necessary clearances for the leaded component stuffer. My tech spent almost a month laying oput the PCB, and after it was completed the contract mfg changed their minds about the required clearances (they doubled), and he had to re-do the *entire* layout. It took 2-and-a-half weeks the 2nd time, and we were not happy. The word "f*ck" featured prominently in our discussions.

After that PCB was laid out, they changed their minds again, and we hit the roof. A site visit showed the problem was a lack of competence on their part - we showed them what to do and they managed to make it work

- the prototype run of 200 units was perfect.

The hilarious part is they then went on to manufactuer 1000 units, of which about 400 had piss-poor reflow soldering - esp. around the TQFP144, the solder paste hadnt reflowed at all. We sent 10 back to be reworked, and they came back looking like a plasma cutter had been used to do the job. So I spent 3 weeks hunched over a binocular microscope, doing it by hand.

needless to say that was the last job they ever did for us, and I take great delight in spreading the story far and wide (NZ is a small country). bastards.

Cheers Terry

Reply to
Terry Given

The one I did this morning is 6.5x5mm and has 4 components on it. Just can't compete. (I bet I'm less competitive than all of you.)

Paul Burke

Reply to
Paul Burke

I saw the costed BOM for that PCB yesterday. total parts cost (excl. 121 LEDs) is $8 less than the micro cost in the (non-functioning) design it replaced. Its 120 copies of the same thing.

ya gotta love SMT :)

Cheers Terry

Reply to
Terry Given

John Larkin wrote: [snip]

I've got 45 SOIC14s, a SOIC8, a TQFP44, lots of 0603s and 1206 quadpacks, a few dozen dual transistors, 121 photodiodes and 120 LEDs. Oh, and a crystal and a buzzer too :). The layout was a bit tricky because of the circuit design - 1000x gain on lots of signals that run all over the PCB, so crosstalk was a problem.

I love my job :)

I especially like laying out analogue circuits (they are "ue" better than analog circuits ;) in smt, its a real challenge to make basically single-sided layouts.

thats the smart approach. I like vertical integration, but a good contract manufacturer is the next best thing. The guys I am using for the first PCB are fantastic, they really know their stuff.

my ABSE doesnt always work that well (I blame Telecom). I often cant see posts, this one included. Another problem is the blank post - no content at all.

I'll have a crack at it, although I have never tried to download a pic from my camera (shock, horror).

Regards, Terry

PS if you guys ever make it down this way, look me up.

Reply to
Terry Given

I had the same thought - Find a reason for one more part. Maybe a 0u1 cp or something.

Jeff

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Reply to
Jeff

will do.

I installed my camera software, and downloaded all of the saved images. fine. Then I took a photo, and now my PC doesnt recognize the USB device. Aaargh!

Cheers Terry

Reply to
Terry Given

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