Tee networks in TIA feedback loops

"Nemo" schrieb im Newsbeitrag news:otYcq.5666$ snipped-for-privacy@newsfe03.ams...

Hello Nemo,

The drawback of every T-network is higher noise and offset drift. So there there are only drawbacks for yor TIA. Don't use a T-network.

Helmut

Are you bootstrapping out the photodiode capacitance? Bootstrap plus cascode can improve bandwidth by 100:1 or so. Phil has some notes on his web site, and more in his book.

John

With high-value feedback resistors, T networks are not a win. The resistor noise dominates the amplifier noise, so there's no reason to accept the higher offset voltage.

Whether there's a SNR hit or not depends on how you do it. If the optimal design needs a 1G feedback resistor, and you decide to use a

100:1 voltage divider feeding a 10M feedback resistor, your input current noise just got worse by 20 dB, which is bad.

On the other hand, feedback T networks can help SNR in some situations, by reducing the second-stage noise contribution. This is mostly an issue with feedback resistors smaller than 10k. The key thing is to keep the same (i.e. optimal) feedback resistor, and use the T network to get a bit of voltage gain from the stage, to override the second stage's input voltage noise.

You're stuck with the differentiated input noise of the amplifier, regardless, but you keep winning by parallelling N BF862s until either your power supply melts or the gate-drain capacitance starts to dominate the PD capacitance. (You win lower noise by sqrt(N), but lose linearly in N once the capacitance gets too big.)

It's also a win to bootstrap the bootstrap, and to make the bootstrap gain as close to 1.0000 as you can--I just finished a bootstrapped-bootstrap design where the first stage output is from the bootstrap, rather than from the hot end of the PD--no TIA stage required. It'll work beautifully if we can guard out the stray capacitance to ground.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510
845-480-2058

hobbs at electrooptical dot net
http://electrooptical.net

[...]

That reminds me of a financial market comment on Limbaugh's channel: "And then they leveraged the leverage that was already leveraged" :-)

But yeah, bootstrapping can be great.

--
Regards, Joerg

http://www.analogconsultants.com/

Bootstrapping the bootstrap is the only way to get the effective capacitance below C_DG of the BF862(s). This particular design has a boostrap gain of about 0.995ish, and holds up well over frequency, so that the bandwidth goes up by about 130 times compared with the plain RC.

It still has the differentiated noise, and we have to keep the capacitance to ground at the hot end of the photodiode about 0.1 pF or less. That ought to be quite doable with a bootstrapped island in the ground plane (big enough that the fringing doesn't dominate) and a small piece of copper-clad polyimide over top, also bootstrapped.

Because the bootstrap gain is so nearly 1.0, there isn't a lot of opportunity for nonlinearity, so I'm taking the output from the (low impedance) bootstrap, which I haven't seen done before. (Of course I don't get out much.) ;)

High dynamic range design is fun.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510
845-480-2058

hobbs at electrooptical dot net
http://electrooptical.net

Increases the noise.

John

It was more like *KABLAM* in fall 2008.

--
Regards, Joerg

http://www.analogconsultants.com/

130 is impressive.

Yup. Done it for most of my career because instantaneous dynamic range in medical ultrasound Doppler has about the same importance as horsepower does in the world of muscle cars.

--
Regards, Joerg

http://www.analogconsultants.com/

We'll see how the actual board comes out. Could be somewhat less depending on the efficiency of the guarding;

"There's no substitute for decibels."

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510
845-480-2058

hobbs at electrooptical dot net
http://electrooptical.net

I don't have significant voltage noise in the subsequent stage, and first stage gain is "only" 1M, so it sounds like Tee's are no help. I found a Pease Porridge article which mentioned hey are SOMEtimes justified, at low ratios of maybe 3:1, to help tame diode capacitance which is why I wondered about this approach. But it doesn't seem to quell the instability.

Yup I figured that from your post a few weeks ago 8)

I'm afraid I don't know what you mean by this. So far I've simply been using a BF862 source follower as per one of the Linear Tech app notes (BTW did you know the LSK170C from Linear Systems is, on paper, a second source for this - but in practice it seems to be perhaps a shade noisier). I've tried running it at various currents as JFETs are meant to be slightly quieter at high currents (can't say I've found any difference, maybe my other noise sources are swamping the effect).

and to make the bootstrap

It's a shame I live on the other side of the Atlantic or I would be interested in that lab assistant post you mentioned, even at a cut in pay. You do some fun stuff and whoever gets that job will have fantastic experience.

Bootstrap: yes, but reading what Phil says I realise I need to improve that. Enormously.

I have his book and the cascode buffer was the first thing I tried. However, it's best for signals in the uA region. I'm trying to resolve down to maybe 100pA and the shot noise of the 7uA quiescent current through his cascode transistor has a shot noise of about 500pA over

100kHz. And I found problems with DC drift because it's sensitive to tiny fluctuations in supply voltage. These can be ignored for a gain of 1M but my overall gain is 1G and they show up quite strongly. It's a measure of how bad my first breadboard was that it still improved my S/N! I've certainly learnt a lot about all manner of analog on this journey. I tried cutting corners like in the power supply at first...

You hang an emitter follower off the JFET source, and use that to bootstrap the drain of the JFET. Use _big_ capacitors, because you care about the phase shift. Take the PD bootstrap cap from there too. If you expect short pulses, pick the BJT polarity so that the follower turns on harder when you get a pulse of light.

The major source of voltage error is the limited g_M of the FET--it's about 30 mS, but that's a factor of 10 less than a BJT at the same current. Using a current source load for the FET helps a lot, but make sure it's a quiet one. It isn't hard to make a sub-Poissonian current source, you just use a regular BJT with fixed base bias and a few volts' drop across its emitter resistor. You win by running the followers fairly hot--15 or 20 mA is often best. Be sure to bypass the base to the negative supply, or the supply noise will come right in on top of your signal.

(There's a poor-man's version of this, which is to run the FET and BJT like a Darlington, with the FET's source load being a small resistor R_P from base to emitter of the BJT, so that the drain current is nearly constant at V_BE/R_P. H&H have that one, I'm pretty sure. You don't get as high a source load impedance that way, and the shot noise of the BJT corrupts the low noise of the FET.)

Oh, and remember to use a two-pole capacitance multiplier on the PD bias supply, and crank up the bias as far as you can. A fully-depleted PIN PD will have lower capacitance by a factor of 6ish, which improves the noise and the bandwidth at the same time.

Thanks. It would be more fun with a talented colleague! Drop in if you're ever in the neighbourhood.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510
845-480-2058

hobbs at electrooptical dot net
http://electrooptical.net

I was playing with that configuration, jfet source follower with NPN current sink pulling it down. If Spice is to be believed, a suitable NPN current sink, using the 2N3904 model and a few volts across the emitter resistor, has a Zout of about 250K at low frequencies, 30K maybe at 1 MHz. That's starting to make a divider with 1/Gm of the fet follower (ballpark 25 ohms), worse as the frequency goes up.

Maybe an RF transistor would be better as the fet source load. Or some compound thingie. Bootstrap current sink?

Maybe what we need here is more bootstraps.

ftp://jjlarkin.lmi.net/Bootstrap_more.JPG

John

If you need DC accuracy and add extra current across the photodiode, to keep a cascode transistor happy, you have to subtract that current out somewhere else and, as you note, that's delicate.

We did a design, based on one of Phil's concepts, that needed some standing current to work better. We used 5 volts through a 50M resistor, theoretically no shot noise. The trick was to find some 50M metal film resistors, rare beasts. Cermets, easy to get, had shot (or some sort of "excess") noise that was terrible.

100 pA is getting down there.

John

I looked at that during the design, but I was a bit worried that the whole thing would oscillate, so since it didn't make too much difference for the intended purpose, I went with ~300 MHz devices for the current sinks. Since there's so much emitter degeneration, they don't need to be matched devices, of course, so you're right, perhaps a faster device would be a win for the FET source load.

I used an 8 GHz transistor for the follower. That ensures that its beta holds up well, so that the load capacitance reflected back to the base wouldn't be the limiting factor at high frequency.

It wouldn't need to be that much faster to be better than good enough. If you took something pretty hot, like a BFG505 (f_T ~ 9 GHz, beta ~ 120 typ), the beta rolloff and C_CB problems would essentially go away, but the fairly low Early voltage would reduce the low frequency gain some. I should probably look for some medium speed (~1-2 GHz) transistors with decent Early voltage. Any suggestions? (Back in the day I'd probably have used a 2N5179, with VAF ~ 100V, but they aren't the quietest things in captivity.)

I like the idea of using some AC stiffening of the current source, but in this case I'd worry that the input capacitance of the op amp would do more harm than good at higher frequency--C_CB of a 2N5179 is less than 1 pF, and I don't know of an op amp whose C_in is below 2 pF.

Op amps also have fairly horrible supply rejection problems at high frequency, so the supplies would have to be quieter. BJT current sinks are easy to insulate against supply problems--you just put a 1k-ish resistor in series with the base, and a BFC from the base to the negative supply. That way the supply junk can only enter via C_CB and the Early effect, which is a much better situation than in you average op amp.

Bootstraps sure are fun, aren't they?

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510
845-480-2058

hobbs at electrooptical dot net
http://electrooptical.net

Phil described a bootstrapped bootstrap thus:

For decoupling, I generally use a 10uF X7R in parallel with a 10nF COG/NPO to catch the high freq stuff - is this what you mean by big?

Take the PD bootstrap cap from there too. If

Yes I've only recently grasped the decouple-to-negative trick 8)

I'm already doing those 2 items (learnt through earlier overconfidence)

Thank you, this is all very educational. Much appreciated.

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Without running spice and just thinking out loud, is the bandwidth of that emitter follower all that big of a deal. Why couldn't you feed forward across it with a cap from B to E. Capacitance seen across the BJT is isolated by the JFET.

Basically the cap from B to E would hold the signal when operating at high frequencies. Of course, you've built these and I'm just doing arm chair engineering. A little bit of feedforward often does wonders. Too much and you have a mess on your hands.

Isn't this all just a trade-off, i.e. going to the RF transistors means lower beta and thus less isolation, so at some point in frequency land, the bootstrap will suffer.

Not only do op amps have poor PSRR at high frequencies, but so do LDOs. For on-chip designs, I've found shunt regulators have the best PSRR. I just feed them with a P-fet current source. Though shunt regulators are looked down on in general, this may be a case where they are useful. I mean you are wasting power like crazy on the jfet already, so who cares about a low efficiency shunt regulator. I haven't investigated PSRR of off the shelf regulators, so my experience may not relate to board level design, but it is worth investigating.

They get funner as the frequency goes up. Here's my fast linear ramp generator...

ftp://jjlarkin.lmi.net/Ramp.JPG

It's simple and eliminates all sorts of complications you'd get from trying to make a clean, fast active current source. Even more fun: a resistor across the cap will bow the ramp down a little, and a bit of gain in the opamp will curve it up. That's a second-order correction for uglies.

That ADA4899 is sort of a shocking opamp. 600 MHz and 1 nv/rthz and really good DC specs. Voltage mode, unity-gain stable, brutal outputs.

Cin is 4 pF, but that hardly loads the roughly 25 ohm output of the jfet. That's a 100 ps time constant!

John

In a high performance bootstrap, _everything_ is a big deal. The difference between an AC gain of 0.95 and 0.995 is a factor of 10 in bandwidth.

I agree. In this case, though, you need to have the impedance level dropping ~100x per stage, so the earlier stages are way too wimpy for feedforward to work. Loading down the FET is the major no-no.

You can't keep a gain of 1.000 all the way to daylight, it's true. However, the practical limit is set by the differentiated noise of the first stage bootstrap device, in this case a single BF862. In my world, once the SNR starts to tank, bandwidth isn't important any more.

I rely very heavily on capacitance multipliers in front ends. They're squishy down at low frequency where nobody cares, but they're clean as a whistle at high frequency where it matters. You can get something like

140-160 dB rejection at SMPS frequencies if you're willing to spend 1.5 volts or so, e.g. this one that I posted last year under the topic "Improved capacitance multiplier". You really can't do high performance front ends without them these days--quiet linear-regulated supplies are nearly extinct.

Q1 Q2

IN DNLS160 DNLS160 3 OUT

0-----*--- --------- ------RR-*--------0 | \ / \ / | | \ A \ A | | --------- --------- | 390 R | | === 47uF alum R | | | || 1uF X7R | 390 | 330 330 | | | | | GND *--RR---*---RR---*---RR---*----+ | | | | | | | | | R 91k === === === === R 1u | 1u | 1u | 1u | | | | | | | GND GND GND GND GND

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510
845-480-2058

hobbs at electrooptical dot net
http://electrooptical.net