So, I had this application requiring really absurd amounts of ripple rejection--it's a piezo driver in a laser wavelength locker that (for historical reasons) has to run off a fairly crappy dual isolated 48V DC-DC converter. The 48V has almost a half volt of ripple at 47 kHz, and the output noise needed to be in the nanovolts.
As we've discussed here before, ordinary cap multipliers are limited by Early effect and collector-emitter capacitance. This one is a bit complicated--14 parts--but according to LTSPICE it provides 180 dB of ripple rejection from about 40 kHz to above 10 MHz. (In reality it won't be this good of course.) The interesting thing is that even with a it drops only about 1.5V, due to daisy-chaining the RC lowpasses--the second stage is biased from the base of the first stage instead of the emitter, which saves a diode drop. Adding the second stage requires only about 350 mV total.
The remaining limitations are due to the combined Early effect of the transistors--very small, since they form a cascode pair--and all the interelectrode capacitances in series.
Good medicine for the present problem!
IN DNLS160 DNLS160 3 OUT0-----*--- --------- ------RR-*--------0 | \ / \ / | | \ A \ A | | --------- --------- | 390 R | | === 47uF alum R | | | || 1uF X7R | 390 | 330 330 | | | | | GND *--RR---*---RR---*---RR---*----+ | | | | | | | | | R 91k === === === === R 1u | 1u | 1u | 1u | | | | | | | GND GND GND GND GND