Improved capacitance multiplier

So, I had this application requiring really absurd amounts of ripple rejection--it's a piezo driver in a laser wavelength locker that (for historical reasons) has to run off a fairly crappy dual isolated 48V DC-DC converter. The 48V has almost a half volt of ripple at 47 kHz, and the output noise needed to be in the nanovolts.

As we've discussed here before, ordinary cap multipliers are limited by Early effect and collector-emitter capacitance. This one is a bit complicated--14 parts--but according to LTSPICE it provides 180 dB of ripple rejection from about 40 kHz to above 10 MHz. (In reality it won't be this good of course.) The interesting thing is that even with a it drops only about 1.5V, due to daisy-chaining the RC lowpasses--the second stage is biased from the base of the first stage instead of the emitter, which saves a diode drop. Adding the second stage requires only about 350 mV total.

The remaining limitations are due to the combined Early effect of the transistors--very small, since they form a cascode pair--and all the interelectrode capacitances in series.

Good medicine for the present problem!

Cheers

Phil Hobbs

Q1 Q2

IN DNLS160 DNLS160 3 OUT

0-----*--- --------- ------RR-*--------0 | \ / \ / | | \ A \ A | | --------- --------- | 390 R | | === 47uF alum R | | | || 1uF X7R | 390 | 330 330 | | | | | GND *--RR---*---RR---*---RR---*----+ | | | | | | | | | R 91k === === === === R 1u | 1u | 1u | 1u | | | | | | | GND GND GND GND GND
--
Dr Philip C D Hobbs
Principal
ElectroOptical Innovations
55 Orchard Rd
Briarcliff Manor NY 10510
845-480-2058

email: hobbs (atsign) electrooptical (period) net
http://electrooptical.net
Reply to
Phil Hobbs
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Where do you get caps with low enough microphonics for a design like this? (Must be cheap, surface mount, ROHS and in-stock somewhere.)

I've tried to design cap multipliers in the past in an attempt to get very low noise voltages, but the microphonics seem to limit the results.

Thanks, Allan

Reply to
Allan Herriman

Leaded film caps are the best--if you absolutely can't use them, then I suppose it's a case of "too bad, so sad." Down where board microphonics are a big problem, the PSR of the op amps helps a lot, but not at harmonics of 50 kHz.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal
ElectroOptical Innovations
55 Orchard Rd
Briarcliff Manor NY 10510
845-480-2058

email: hobbs (atsign) electrooptical (period) net
http://electrooptical.net
Reply to
Phil Hobbs

=A0 =A0 =A0 =A0 =A0OUT

=A0 =A0 =A0 |

=A0 =A0 =A0 =A0|

|

=A0 =A0 =A0=3D=3D=3D =A047uF alum

=A0 =A0 =A0 =A0 | =A0 || 1uF X7R

=A0 =A0 |

=A0 =A0 =A0 =A0GND

91k

=3D=3D=3D =A0 R

t

Fun, I would have first tried taking the drive for the base of Q2 from the collector of Q1, rather than the long string of RC's. Did you perchance try it that way also? And was it worse?

George H.

Reply to
George Herold

It's quite a bit worse, because that makes the whole string only a second-order lowpass, vs. fourth order for the long string. Also you don't gain any headroom, because Q2 only drops 350-450 mV as it is, and you can't go a lot lower than that and still have any beta left.

If this were a sane application, of course, I wouldn't need to turn the crank this tight, but it's still nice to see what you can get for less than the voltage drop of a vanilla Darlington cap multiplier.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal
ElectroOptical Innovations
55 Orchard Rd
Briarcliff Manor NY 10510
845-480-2058

email: hobbs (atsign) electrooptical (period) net
http://electrooptical.net
Reply to
Phil Hobbs

Use 100 uF polymer aluminum caps and pick up another 160 dB!

John

Reply to
John Larkin

"John Larkin" wrote in message news: snipped-for-privacy@4ax.com...

Or MIL-39006 tantalums. I wonder if you can get them with heavy gold plating.

Tim

--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms
Reply to
Tim Williams

Wow, attovolt noise, kewl. Fame and fortune await. ;)

Out beyond 100 kHz, it's limited by the ESR of the caps and the Early effect. 470 nF would work fine if it were a 100 kHz switcher.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal
ElectroOptical Innovations
55 Orchard Rd
Briarcliff Manor NY 10510
845-480-2058

email: hobbs (atsign) electrooptical (period) net
http://electrooptical.net
Reply to
Phil Hobbs

Does "dual isolated" refer to Class 2 isolation (two isolation barriers) or two 48 V output power supplies in series in order to produce +/-48 V ?

Opt amps would suggest +/-15 V power supply.

Is the capacitance multiplier only intended as a filter on the +48 V to +15 V line regulation and a separate filter (with PNP transistors) on the -48 V to -15 V side or is the Opt amp power supply voltages derived from a single filter ?

Is that Gnp connection also used as signal reference ?

Getting ripple down to 1 nV can be hard, if there are significant ripple currents flowing in other parts of the same ground plane on the input side of the filter. Circulating the ripple current as close to the power supply as possible (e.g. LC filters), will reduce the problems caused by circulating ripple currents especially in long connection wires, with their inherent impedances.

Reply to
Paul Keinanen

The supply is a Pico SIRF48D.

Yes, but this is a piezo driver, as I mentioned. It uses TI HV op amps.

It's a bridged amp design with a single-ended power supply. The output of the cap multiplier is about +46.5 V with a +48 V input.

This is a differentially-connected piezo driver, but at some point the CMR of the op amps starts to be important.

Yes, there will almost certainly be some inductively-coupled junk. I tested with a scope probe shorted via its ground lead--the pickup is worse with the ground lead wound in two turns than with one turn, and mostly goes away when you reverse one turn by twisting it 180 degrees out of the plane (so that the intercepted flux cancels instead of adding). That last test pretty well rules out capacitive effects as the leading cause.

Ultrasensitive instrument design is an onion problem, so when you find one nasty, you nail it to the floor and move on to the next one. If this client gets as far as needing cost reduction, we'll see if we can shave one or even two poles off the cap multiplier. It won't be the first cost reduction step, because the parts are all cheap.

(I thought this design was interesting because of its favourable combination of high rejection and relatively low voltage drop, not because it's a complete solution to all SMPS problems.)

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal
ElectroOptical Innovations
55 Orchard Rd
Briarcliff Manor NY 10510
845-480-2058

email: hobbs (atsign) electrooptical (period) net
http://electrooptical.net
Reply to
Phil Hobbs

With bridged configurations, shouldn't extreme opposite symmetry between the left and right side layout help in reducing differential ripple voltages ?

Anyway, 1 nV ripple requirement seems a bit strange.

At room temperatures and 50 kHz bandwidth, the noise power (kTB) is

-127 dBm.

Thus, the source resistance would have to be a few milliohms.

Is this realistic in practice ?

Reply to
Paul Keinanen

Tants would be safe in that circuit, at least the ones on the bases. But polymer alums have absurdly low ESRs.

John

Reply to
John Larkin

You like flames?

Reply to
Jamie

I'm interested in getting rid of the 50 kHz and its harmonics down to that sort of level, not the broadband noise. I can't describe the application in detail, unfortunately, but it's an ultrasensitive interferometric instrument being developed by a client of mine, and needs really really good laser locking. The SMPS noise is getting into the piezos, which puts sidebands on the laser line in very inconvenient places--they alias all over the place, due to a 12.5 kHz digitizing rate.

Onion problems are best treated by nailing each layer to the floor--otherwise a couple of layers later, you wind up having to do it over again. The difference is between "I'm sure it'll be fine" and "Junk on the power supply lead is _not_ the problem." (Yes, you do have to be paranoid about inductive coupling into supply traces after the cap multiplier...but if so, that's another layer.)

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs
Principal
ElectroOptical Innovations
55 Orchard Rd
Briarcliff Manor NY 10510
845-480-2058

email: hobbs (atsign) electrooptical (period) net
http://electrooptical.net
Reply to
Phil Hobbs

"Jamie" wrote in message news:bxlAo.5967$ snipped-for-privacy@newsfe13.iad...

Er, check out M39006 -- they're *liquid* tants! So if they cook off at all, they spray boiling sulfuric acid gel, but don't go all thermite on you. They're rated to absurdly high temperatures, too, like 200C. AFAIK, ESR is comparable to any other type.

The only problem is they're expensive as hell. Hence my gold plating comment.

I think it was Jim Williams, who once needed large, very low leakage caps. It turns out, these tants are essentially ideal, after a few days settling time. But it's rather pricey to sort through, say, ten of them, to get maybe three with really, really low leakage...

Tim

--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms
Reply to
Tim Williams

Paul Keinanen wrote: : On Wed, 03 Nov 2010 03:52:19 -0400, Phil Hobbs : wrote: : Anyway, 1 nV ripple requirement seems a bit strange.

: At room temperatures and 50 kHz bandwidth, the noise power (kTB) is : -127 dBm.

There are applications where this sort of ripple requirements make sense. I'm looking at Phil's design with keen interest: in my application (SQUID biasing) the resistive parts of the circuit are at liquid helium temperature where picovolts count. The circuit to be biased might also be physically at room temperature, but far from thermal equilibrium, such as low-loss capacitive MEMS systems.

Ken Tucker proposed voltage sensing fast feedback, but that's exactly what Phil's circuit does: it observes Vbe of the final transistor and 'feeds back' by controlling the transistor current. With a given transistor technology (a given fT) it's hard to imagine how one might do this faster (i.e. get a better high frequency rejection) - any more complicated combination of transistors (such as an op amp) is bound to have a longer feedback path and be slower. Or maybe I'm overlooking some possibility?

Regards, Mikko

Reply to
Okkim Atnarivik

That's true to some extent, because there are only so many ways to combine transistors in stages while maintaining stability. For instance, if you just cascade a bunch of stages, you can easily get gobs of gain (>>120dB), but with an obscene phase shift, you can't use it for anything. It's like cascading op-amps: you need a loop around each one. If you simply put one amp straight into the other, you're cascading integrators and you get an overall 180 degree phase shift at almost any frequency. The slightest loop phase shift sets the exact oscillating frequency. Any attempt to compensate such a monstrosity will only become stable well below rated fT.

Thing is, even if you bring thousands of transistors to bear, in the digital domain for instance, you can still get a circuit that operates up near a useful fraction of fT. Practical analog circuits can use hundreds of transistors and still obtain disturbingly excellent behavior (LT1016 for instance, a 60GHz GBW comparator that's also unity gain stable as an op-amp!).

Tim

--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms
Reply to
Tim Williams

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=A0 =A0 =A0 |

=A0 =A0 =A0 =A0|

|

=A0 =A0 =A0=3D=3D=3D =A047uF alum

=A0 =A0 =A0 =A0 | =A0 || 1uF X7R

=A0 =A0 |

=A0 =A0 =A0 =A0GND

91k

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t

This thread provided good fodder for thought. (Thanks Phil.) Though the cap multiplier provides low noise, it=92s got a few down sides as a power supply. First the output impedance is pretty poor. (a few ohms in the one I=92ve built.) Second the output voltage takes a while to settle down.. and can wander around a bit. (Again this is for my incarnation of the circuit. The wandering is at the 0.1mV level.)

I thought I might be able to tame both these issues by sticking the whole circuit inside a slow control loop.

Something like this,

(V+)-+------------------------+ | | P |\ | 10k O--RR--| b Q1 | C1 +-|-/ |\ e GND C1 | |/ | | | +-R2--+ GND | | | | | |/ c | +--+----| b Q2 | C2 |\ e | | | | GND | +------------+--Load | GND

I slapped this together on some white proto-board. And it seemed to work OK. I=92ll have to build it more carefully and put it in a metal box to check the noise performance.

A few questions, and comments.

I built it first without the R1 C1 on the input. It was unstable. R2 C2 forms the cap multiplier with a TC of ~10ms. I had to slow the thing down. Is there some other way to slow down the loop? I=92ve now got the R1 C1 time equal to the R2 C2 time.

After seeing Phil=92s circuit I realized I could use the output of the opamp as the reference for the cap mult. rather than the emitter Q1. This gained about 0.5 Volts of head room.

George H.

Reply to
George Herold

t

Paul, it's not 1nV of ripple, but 1nV/rtHz of noise, which is not quite as extreme.

We wanted to show that the current through a resistor had no shot noise. To do this we 'needed'* a power supply with less noise than the Johnson noise of the resistor. The cap multiplier was the answer.

George H.

  • well we didn't really need this, but it makes it a lot more obvious.
Reply to
George Herold

No, I think it was 1nV of ripple. IIRC he said 1V of 40kHz with 180dB of attenuation...

[...]
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John Devereux
Reply to
John Devereux

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