According to Wikipedia:
GDSII files are considered to be the final output of the IC design cycle and are passed to IC foundries for IC fabrication. These GDSII files were originally produced on magnetic tapes, hence the final moment of the IC design process became known as tapeout.
-- I always thought it was called "tapeout" because, long ago, you literally taped out your design on rubylith or similar at, e.g., 10x scale before it was photimaged down to the real IC size. Not so? ---Joel
I think it refers to the magnetic tape, because the GDSII was what was called "tapeout"... though they're usually on CD or DVD now-a-days ;-)
...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC\'s and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
My understanding is (was?) the early designs were done much like multilayer printed circuit boards (perhaps before there were multilayer boards), with black tape hand-applied to clear film, and a somewhat greater (okay, MUCH greater) photographic reduction than 10:1 was used to get to the actual IC size. This pic looks like it:
The "standard" scale is 400X.
"Tapeout" =/= "Tapeup"
"Tapeout" has always referred to the GDSII file that had been checked against DRC rules.
...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC\'s and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
All my designs were 1:1 ,then make a contactcopy in reverse on film, and expose/etch the print. No such luxury as computers,etcetera ahem......
I once saw an article in BYTE or something, about the making of the
6809 processor. One of the main photos was of a few guys standing in front of this artwork on the wall, about 8' high by about 9' wide, which was allegedly the whole chip.That, I think I'd call a tape-up. ;-)
Cheers! Rich
design
was
On an IC? Nonsense... unless your feature size was gross. Even back in the '60's we did 100u feature sizes.
...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC\'s and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
design
was
100u what ? Inch ?Graham
design
was
Pardon my off-the-top-of-my-head math...
It was 0.25mil ~= 6u feature size. That's hard to do with tape ;-)
...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC\'s and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
What I don't like about that wiki is the GDS files went to the mask shop, not the foundry, since few companies make their own tooling.
I always thought the final moment of IC design is passing QA. Any fool can design, but delivering a manufacturable product is another story. [Pass latch-up, ESD, decent yield, data sheet complete, blah blah blah]
design
was
My understanding was that "tapeout" was originally the manual taped-up drawing, released to manufacturing.
We call that a RIT (Release Interface Tape), though they've been electronic "tapes" for thirty years. RIT-A is the silicon, and RIT-B is the metal. "The chip RIT on time (!!!yeah!!!, congratulations - now back to the salt mines)".
-- Keith
I recently asked Bob Pease about this very thing. I suspected "tapeout" referred back to the old rubylith layout method.
He went and asked some real old-time IC designers.
They say "tapeout" referred to the magnetic tape, not the rubylith.
Another myth busted.
I think that's peculiar to IBM. I've _never_ heard that terminology before... I repeat...
"Tapeout" has always referred to the GDSII _file_ that had been checked against DRC rules.
And I've been at this stuff for more than 44 years.
...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC\'s and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
Is there anyone older than Pease ?:-) He graduated MIT the year before me... 1961, I'm Class of 1962.
Yep. Agreed.
...Jim Thompson
--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC\'s and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
| http://www.analog-innovations.com | 1962 |
I love to cook with wine. Sometimes I even put it in the food.
It is. IBM did automatic mask generation before others, so the differing terminology isn't surprising.
...learn something new every day. You (and Ancient_Hacker) have convinced me. I thought the term was older.
GDSII? ;-)
-- Keith
On the other hand, IBM had no problem getting enough computer time.
-- Service to my country? Been there, Done that, and I\'ve got my DD214 to prove it. Member of DAV #85. Michael A. Terrell Central Florida
In message , dated Thu, 14 Sep 2006, Jim Thompson writes
There must be, I would think. I don't have time to go back to get dates for G W A Dummer etc., but early experimental ICs date from the 50s (excluding Loewe tubes, of course), and some people still alive would have worked on them. They may not still be active in electronics, of course.
-- OOO - Own Opinions Only. Try www.jmwa.demon.co.uk and www.isce.org.uk There are benefits from being irrational - just ask the square root of 2. John Woodgate, J M Woodgate and Associates, Rayleigh, Essex UK
design
was
LOL! Reminds me of a stupid error I made in digital IC design class (yes, using a computer). I forget to put the unit u somewhere so the simulation package complained: "Warning: your MOSFET Q5 is 10cm wide, are you really sure about this?"
-- Reply to nico@nctdevpuntnl (punt=.) Bedrijven en winkels vindt U op www.adresboekje.nl
Well, at least on the first order. Consider that work expands to fill the (compute) time given. In the '70s a friend was forced to do MonteCarlo transient analysis on a circuit he was designing. It took many weekends on several dedicated mainframes for him to run the number of simulations that were requested. The bill, even though it was blue money, was rather large. A total waste of cycles.
-- Keith
was
Bob used to sell his books out of the trunk of his VW at the Foothill Electronics flea market. Those were the days. I regret not photographing some of these silicon valley classics....
ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.