"summing" lookup tables

I assume the bits you are counting are the input bits? So you wish to impl ement an arbitrary function of six inputs? The typical way of doing this u sing 4LUTs is to use four for the four sub-functions as if each were select ed by a function of 2 bits, then use a 4 input mux to select the appropriat e 4LUT. That mux is itself a function of 6 inputs however, so if you need to implement that with LUTs it will take three, 3LUTs to implement 2 input muxes. The easy way to think of this is of a 64 bit memory made from four

16 bit memories and more muxes.

I'm not at all clear about what you are describing with 3 into 4 and 4 into 3.

What I described is the way to implement ANY function of 6 inputs regardles s. Not all functions you might want to implement require this much logic. In PLDs the development software will figure this out and use as few LUTs as possible. Won't the GreenPak software do that for you? What I describe d is the way to implement ANY function of 6 inputs regardless.

I was thinking of using a GreenPak part for this design I'm working on. If it didn't need to use two power sources in my design I might go for it. A ctually, I just realized that if the pass transistor passes enough current when the input is not powered... I could get power from the battery that wa y. There has to be an isolation diode to prevent power from back tracking from the supercap to the 5 volt rail, so the chip might get power at that p oint even if the power is off. I bet these chips won't work down to low vo ltages though. I would need 1.75V in this case since there is going to be a loss through the diode or PFET.

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Right, to have a 64 bit arbitrary table you clearly need 64 bits of memory. A 3 + 4 only has 24 bits of memory so can't do that unless symmetry can be exploited, somehow.

In any case I did find a way to do what I want to do using multiplexers instead, thanks for that hint

implement an arbitrary function of six inputs? The typical way of doing th is using 4LUTs is to use four for the four sub-functions as if each were se lected by a function of 2 bits, then use a 4 input mux to select the approp riate 4LUT. That mux is itself a function of 6 inputs however, so if you n eed to implement that with LUTs it will take three, 3LUTs to implement 2 in put muxes. The easy way to think of this is of a 64 bit memory made from f our 16 bit memories and more muxes.

into 3.

OK, I get what you were saying before. You were talking about a single 3LU T and a single 4LUT. No, that will work for some functions of 6 inputs, bu t not all by far. I guess you got it now.

Welcome.

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Because I can exploit symmetry in my case but it's easier to express using multiplexer than putting tables into tables. And you can click on a 3-LUT in the designer and make it whatever standard logic block you want including a 2 input multiplexer.

Unfortunately no with this GreenPAK designer-thing other than able to re-configure some LUTs as standard gates and reconfigure some LUTs as flip-flops you get the "parts" you get you can't really get down to the macrocell level and build arbitrary combinations like 5-input or 6-input LUTs or such.

Yep a bit of a brain fart, no it's not as simple as making a 3 input AND gate from two; to have 64 bits of arbitrary output for 6 in there gotta be 64 bits of storage somewhere a-dur!

These GreenPAK chips have long been on my list of cool devices if only I had a use for them. Do you find them useful? And do they work well in small quantities with programming as part of the board production process, or are they really only suitable if you have enough quantities for pre-programmed devices?

Great little parts !

And I DO mean little !

Hope they are, I'm waiting on my first shipment of programmer + chips to come in. Finished up my first design this evening (early morning!) so lemme get back to you on that one...:)

The designer is very pleasant and intuitive to use at least I've whiled away many happy hours fiddling with a design today, and managed to squeeze in more than I thought I could since the "standard blocks" often seem to give you a fair number of configurable options like whether a flip-flop is a latch or not, whether it has a negative or positive-going reset and so forth.

Oddly the resets on latches an flops don't seem to be synchronous but maybe that's to make operation familiar for people coming from discrete logic, there aren't any logic IC-flops that have synchronous resets AFAIK

Or maybe cuz it's mixed signal, a reset signal could come from an analog comparator

I haven't seen those before.

I note some of the devices have an /asynchronous/ state machine capability. Has anybody tried using that?

Remembering back to the dim and distant past...

The nasty property of ASMs w.r.t. clocked FSMs is that all the design processes I have seen presume that only one input changes at a time. That enables the "state trajectory" on the way to the next state to be defined and controlled to ensure it reaches the correct next state.

If more than one input can change simultaneously, then the number of state trajectories becomes extremely large and essentially impossible to control.

Obviously for very simple well controlled and defined ASMs, that can be avoided by defining minimum timings. But that doesn't work for arbitrary general purpose ASMs.

So, how does the GreenPAK software and hardware deal with that?

r

sh to

f

ink

So it doesn't let you describe your logic with equations or HDL? You have to program each LUT separately and then connect them?

I don't really get what you are saying about tables into tables.

If you want a generic 6 input LUT, the 64 bit table can be split into four

16 bit tables. Each table will correspond to one 4LUT and all will use the same 4 inputs. The outputs of these tables can be combined 2 into 1 with a pair of 3LUTs as 2 to 1 muxes using one more input bit as the select, the n a final 2 to 1 mux with the remaining input bit as the select.

I'd draw a picture but I'm not up to ASCII art tonight. Some day I may dow nload their software and see what the parts will do. I'm not expecting muc h.

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Even synchronous FFs need setup and hold times. At some level of detail, there is no such thing as "synchronous logic".

I like to design ASMs every now and again, but modern logic design tools strongly discourage it.

Jeroen Belleman

Precisely - those are examples of the "simple well controlled ASMs" that I referred to, and you have snipped.

Precisely, for the reasons I mentioned, plus that's the reasoning behind my question.

I'm still curious as to whether somebody has tried the tools and software for ASMs, and how well it worked out.

What does that mean??? Of course there is synchronous logic. It's the stuff the digital world is pretty much made of.

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Flip flops are ASMs; that's the relevant level of detail.

Sorry, you aren't making sense. How is a FF an ASM???

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Drat hit send too accidentally :(

There's no such thing as a digital circuit. They are all analogue circuits which interpret analogue inputs. Where the analogue inputs are within limited bounds, the outputs will also be within limited bounds.

Repeat: there's no such thing as an analogue circuit: they are all quantised at the level of electrons and other less visible levels.

What we call "synchronous logic" is a useful abstraction. It allows one to forget the details of what goes on inside. A synchronous FF is in fact an ASM of which the exposed outputs change state only after a defined transition of one specific input which we call "clock".

Every logic designer should try their hand at making a clocked D-FF out of elementary gates at least once in their lifetime.

Jeroen Belleman

Read and understand any book on fundamental digital logic design. I'm not going to regurgitate that poorly.

If you prefer schematics,

is a suitable starting point.