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Stitching vias

How do those pro motherboard designers, etc. decide how to lay out stitching vias? I've been having a bit of trouble finding a good reference.

Some of it seems a bit like "cargo cult" PCB layout...

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Reply to
bitrex
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Do you mean plane-plane vias? Electrical and thermal?

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John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

I don't really see it on motherboards. Too many layers to bother with, that are already good enough. only where pours/traces have to transition, in which case it's usually just an array of "enough".

Much more common in RF, where you have the ground boundary of a two layer board stitched around the signal paths.

I don't think I've seen many 2-layer (general purpose, digital or analog) boards with stitching, but I've made many myself. Just follow the negative space around traces, and stitch it anywhere you see a peninsula or overlapping or isolated region.

Tim

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Seven Transistor Labs, LLC 
Electrical Engineering Consultation and Contract Design 
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"bitrex"  wrote in message  
news:4bJ_y.1$Bq6.0@fx25.iad... 
> 
> How do those pro motherboard designers, etc. decide how to lay out 
> stitching vias? I've been having a bit of trouble finding a good 
> reference. 
> 
> Some of it seems a bit like "cargo cult" PCB layout... 
> 
> --  
> 
> 
> ----Android NewsGroup Reader---- 
> http://usenet.sinaapp.com/
Reply to
Tim Williams

I'll try to post an example pic when I get a moment...

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Reply to
bitrex

The RF microwave community has reasonable answers for that. Maximum spacing is determined by the shortest wavelength, and too much regularity can lead to resonances.

Even with extensive use of EM field solvers, it is still necessary to suck it and see, and then tweak.

Reply to
Tom Gardner

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