SPICEing The Inductance of a Trace Over a Ground Plane?

Le Mon, 17 Sep 2007 21:34:35 -0700, Joel Kolstad a écrit:

The "for free" might well be a total illusion. I saw my share of such cases leading to various interesting defect mode. A good one was a 68k system where the adjacent databus pins on a multifunction 68k peripheral timer/rtc/uarts/... surrounded the UARTs' crystal pins. The board 'worked' OK until the onboard RAM process shrinked and got better (read faster). Then randomly appeared some UART garbage and RTC time lag. It was traced to charge injection into the substrate which just made the xtal oscillator stop, depending on the transients on the databus pins surrounding the oscillator. That "for free" did cost more than Eur200K.

ESD diodes are intended to protect circuits, i.e. just prevent the circuit from being destroyed and I've yet to see a manufacturer that states that his IC will still work OK when you bias those diodes.

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Thanks,
Fred.

This module has an SMB connector on the front panel...

which allows one module to be programmed as the master, many to be slaves, and one can be programmed to be the slave terminator, such that they all phaselock and trigger together.

I just designed a long, skinny pc board that plugs onto a row of modules and busses them together. I want a clean 50 ohm system, but each connector is a pretty-much-capacitive load, 8 pF roughly, that drags down the microstrip impedance. The solution was a fairly skinny trace between connectors (on 0.8" centers) with 20 nH inductors inline. This simulates as just about 50 ohms and looks very clean and fast with 16 boards bussed. Using discrete Ls allows me to tune it if needed.

The biggest problem is to find SMB females that have reasonable insertion/removal forces, so you don't need hammers and crowbars to install and remove this thing.

John

I just made a peach-blackberry pie, with the last blackberries of the season. Yum. It is round.

John

Why? They have zero static dissipation, and the driver sees a 2R load, which makes it happy, too... less saturation drop, less ground bounce.

Whatever you put in, you get out at the other end. In my example, the load device sees a fast 5-volt edge. The gotcha is that the beautiful waveform is only present at the end of the line, and it's ugly at taps along the way, so it's really good for single point-to-point transmission, line from an ADC to an FPGA, where the drive current/ground bounce advantage is significant.

That's OK for some things, but can cause pattern-dependent jitter, which can be severe.

John

640mm or so circumference?

Best regards, Spehro Pefhany

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"it's the network..."                          "The Journey is the reward"
speff@interlog.com             Info for manufacturers: http://www.trexon.com
Embedded software/hardware/analog  Info for designers:  http://www.speff.com

When you have any kind of real load at the far end this series terminator forms a voltage divider, reducing signal amplitude and making the transmission less reliable. If there's only a wee capacitance things may still be peachy though.

One trick is to employ fast BJTs a followers at the taps. Whenever I present such as schematic during design reviews at a new client the initial comments range from "Ewww" to "Yuck".

Know thy signals. I didn't have any issues with AC termination in the last 20 years or so. One challenge is to determine how large the cap needs to be and not going much over that limit, just enough to mush out tolerances.

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Regards, Joerg

http://www.analogconsultants.com

We turned those blackberries into Schnaps. Gin, brown sugar, blackberries, cinnamon stick, let sit for a couple months, then strain. Yum.

--
Regards, Joerg

http://www.analogconsultants.com

Hi John,

Nice. What's the distance between connectors, and what clock edge rates are you looking at?

We've had the same problem. For awhile we were liking push-on SMA connectors, but unfortunately the inexpensive ones become rather lose after only some dozens of insertion/removal cycles.

---Joel

Agreed.

Yeah, but people do it all the time, and folks like Joerg even seem to sometimes wring enough information out of a data sheet to convince himself it's realiable. :-) Nothing wrong with using a part in a manner the manufacturer didn't think of so long as it's still good engineernig; most people get bitten with stuff like ESD protection diodes because they're not even aware they're "using" them in the first place.

---Joel

ace_g

I use

There's lots of microstrip and stripline options built in. Your air spacing gives 146ohms. PCB material gives 92ohms.

ESD diodes are pretty easy to use. You just need iron-clad info from the mfg where the guaranteed latch-up limits are and then stay orders of magnitude under that. Using opamps as comparators, comparators as opamps or logic chips and analog amplifiers is a whole 'nother ballgame, requires a lot more research.

Some people go a lot farther than I do. The topper was the use of a uC ESD diode as a rectifier. The zero-Dollar "regulator" was a careful balancing of code by putting ballast routines in there so the uC supply voltage would never scoot up. Well, nobody told me about it and when I touched the clock pin and it stopped for a brief period ... KAPOOF!

Other wacky uses of parts is the avalanching of transistors. Whole companies have built business cores around that, for example Tektronix.

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Regards, Joerg

http://www.analogconsultants.com

Or use a huge cap, so the cap voltage just sticks at Vcc/2, and you get a nice equivalent of a thevenin termination without the wasted power. For data that averages equal highs and lows, of course, like a clock maybe.

John

I've seen CMOS datasheets that specified a max operating esd diode current, 25 or 50 mA typically.

John

Then you get just the undesired load change reactions you mentioned. Also, the power consumption goes up a substantially and that's the whole purpose for AC termination in most of my cases. The other is EMI mitigation because a driver chip that consumes less power is also a much quieter source.

The weirdest effect that I encountered after transitioning a huge system from Thevenin to AC was a failing switcher. Click ... beeeep ... click ... beeeep ... We had managed to reduce the system power so much that we were now below the specified minimum load for the switcher.

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Regards, Joerg

http://www.analogconsultants.com

Many oscillator circuits in mfg's app notes will run an input into the substrate diodes on every clock cycle.

--
Regards, Joerg

http://www.analogconsultants.com

Sure. Negative 0.7 peak swing is a nice amplitude limit.

John

Ahhh.. a true pie filter. Pie filters do have some interesting properties...... Whe a pies enter the filter an attenuated pie does not come out. Instead, a highly distorted pie emerges and is often not recognizable as a pie. Also, pie filters have very long propagation delays. Maybe 1 to 3 days. :P

D from BC

ooops... rewrite...

Ahhh.. a true pie filter. Pie filters do have some interesting properties...... When pies enter the filter, attenuated pies do not emerge. Instead, highly distorted pies emerge and are often not recognizable as pies. Also, pie filters have very long propagation delays. Maybe 1 to 3 days. :P

D from BC

However, the dissipation factor after coming out of the oven is rather high around here. One hour later ... not a trace of it left.

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Regards, Joerg

http://www.analogconsultants.com