Ground plane slit?

It's unlikely to help. I'd consider putting most or all of the fpga bypass caps towards the side of the fpga away from the adc, to have that circulating current away from the adc grounds.

But the most important thing to do is manage the (differential?) input of the adc carefully. I'd have to know more about the actual situation to be more specific. The devil is in the details, usually.

Synchronous noise is just DC offset!

John

Don't put a slit in a ground plane in such a way that any traces cross the slit, or bad things happen. Generally a solid ground plane is the best option until proven otherwise. If there are specific coupling mechanisms that you think might be a problem with a solid ground plane, then that would be a good topic to discuss.

(e.g. if resistive drops in the ground plane are the concern, then what is the current density in the ground plane between the grounded points in the analogue circuitry where the voltage has to be the same for no interference to occur, and what level of voltage difference between ground points in the analogue circuit would be sufficient to cause trouble?)

Chris

I you are doing an FPGA, it is likely that you have many layers in the board. This can let you put an extra ground plane in the board under the analog on the comp-side buried trace layer.

Something like this

Analog Digital

Comp copper Comp copper Analog Ground Traces Ground Ground Analog power traces Analog ground traces Vcc Vcc analog ground traces solder copper solder copper

to the OP

read all of HJ's books on black magic...the answer is in there..

Mark

...buried between all the stuff that's either silly or plain wrong.

John