I see it over and over again...use a ground plane...use a ground plane...nag nag nag... I've yet to see a number of how far away that ground plane really is..

I was playing with this: Wide Trace over a ground plane calculator on

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I put in: w = 20mil trace width = 0.000508meters t= 1oz copper = 0.0014in = 0.0000356 meters h = 0.8mm = 0.0008 meters ur = 1

I get an error! Fk...?? Perhaps the ground plane is probably too far away and the trace acts more like a straight wire inductor and less like a transmission line? That or bad coding..

The calculator does work for 0.5mm ground plane to trace spacing.

How are designers selecting how far away the ground plane should be? Anybody have some frequency and distance examples?

I'm trying to spice trace inductance over a ground plane. D from BC

The formula beneath the calculator specifies W >> h. That seems to be what it's complaining about. Maybe that formula doesn't work for some realistic values you are using.

That much separation is (0.8mm ~= 32mils) is higher than most people would use, but certainly within the realm of possibility. (Although your air dielectric there seems a little unlikely...)

Bad coding. A lot of these programs use "curve-fitted" equations that become highly inaccurate or impossible outside of the original domain of the fit... and unfortunately over time the limits of that domain tend to get lost.

You might try a program such as

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-- it has no (immediate) problem with your dimensions, giving a characteristic impedance of 152 ohms... which is probably a bit inaccurate, as experience indicates it's generally somewhat difficult to achieve line impedances that high (i.e., the actual impedance is probably a bit lower, although in air... maybe not...)

If you're doing RF designs, you generally have some specified impedance you're shooting for. With digital designs, you often look at the minimum trace width you'd like to use and then set the ground planes such that you get some "reasonable" impedance (100 ohms is a popular target...). But there's also the consideration that moving the ground plane closer to the trace gets you tighter coupling (between a signal net and the plane) and hence a little better isolation (less noise) between traces, whereas moving the planes closer together couples them more tightly and thereby provides more decoupling capacitance. Generally on 4-layer boards you don't really have the option to stick the planes particularly close together because it leds to signal traces being much wider (>>10 mils, say) than you'd prefer for the sake of signal routing density. (And providing decoupling in the form of discrete caps is cheap and easy.)

The rule of thumb is that, in FR-4 (relative permittivity ~ 4.7), using trace width equal to distance from the plane gives an impedance of ~70 ohms, whereas using trace width twice the distance from the plane gets you ~50 ohms -- both quite workable values.

OK... programs like TxLine will give you characteristic impedance and the

*effective* dielectric constant. Using Z0=sqrt(L/C) and v (signal of light in the medium)=1/sqrt(permittivity*permeability), you can play with the algebra and come up with inductance (per unit length) as Z0/v and capacitance as
1/(Z0*v). Example: Using W=20 mils, H=10 mils, TxLine says you have a microstrip line with impedance of 47.2 ohms and effective dielectric constant = 3.586. v=3e8/sqrt(dielectric constant)=158.4 m/s, so you have inductnace = Z0/v = 298nH/m and capacitance = 1/(Z0*v) = 133.7pF/m. So, something like a
10cm trace at low frequencies (low enough that the trace can be considered a lumped element) could be modeled as a series 2.98uH inductor along with a parallel 13.4pF capacitor... which can be neglected at "low enough" frequencies.

Note that In Real Life there are all sorts of little corrections you have to do to account for end effects any time the trace changes direction or shape (including at the beginning and end), but these can be ignored in most cases until you're up in the hundreds of MHz or so regions. (By the time you hit a GHz, this is all a Very Big Deal...)

Many/most of the simple microstrip calculators are crap. Try making the trace width progressively wider; many will go to zero impedance, then go negative!

Appcad and TXline both seem to do impedance calculations right, and warn you when they don't like the geometry. Neither, to their shame, give c/length or l/length.

Both will report effective dielectric constant Eeff; that, combined with impedance, is enough to calculate L and C. I have a PowerBasic program that does that, if anybody's interested.

A 50 ohm trace on 0.062 FR4 is about 113 mils wide, Eeff=3.44, 3.14 pF/inch, 7.86 nH/inch, 157 ps/inch.

Don't worry, John knows how to do cost effective designs (even if he spends a lot more than $0.10/meal for food :-) ) -- that's his *effective* dielectric constant, since his FR-4 is presumably ~4.5 or so and air is 1.0 and the fields are mixed up in both. (I.e., if the dielectric were constant everywhere at 3.44, he'd have the same result... although of course it'd be a true TEM mode rather than a quasi-TEM mode, but that too can of course generally be ignored unless you're creating absurdly high-frequency signals.... hmm... perhaps John is though...)

"Jim Thompson" wrote in message news: snipped-for-privacy@4ax.com...

Garmin actually designed their own chips once?

I talked to Garmin at a recruiting show back around 2003 and at least the group I talked with said they were now using off-the-shelf GPS receiver modules, such as the popular SiRF units. I ended up with the impressoin that these days they were mainly system-level designers and programmers.

Early '90's. Though I've consulted on debugging a fault in someone else's design as late as 2002.

Now I wonder who might have been involved with SiRF ?:-)

True.

Garmin Ltd. (NASDAQ: GRMN), incorporated in George Town, Cayman Islands, is a group of companies founded in 1989 by Gary Burrell, David Casey, Min Kao and Paul Shumaker.

Gary => Gar + Min = Garmin, both long retired.

Paul Shumaker retired a few years ago... he was the electrical engineer I worked with all the time. His son attends ASU, so Paul and I have met a few times at Chevy's there in Mesa, with our high technology sons ;-)

...Jim Thompson

--
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |

The capacitance is to ground, not from one end of the trace to the other. Also, based on the fact that physical the trace is symmetrical, you often see people illustrate the network as:

---- L/2 ---- | | C/2 C/2 | |

---- L/2 ----

or, if you'd like "ground to be ground:"

---- L ---- | | C/2 C/2 | | Gnd Gnd

Oh, it is -- eventually. The idea is that, at the highest frequency of interest for which you except this model to be valid, each LC section should provide no more than a "small" phase shift where "small" is typically taken to be 10-30 degrees. It's a useful exercise to compare the frequency response of a SPICE transmission line element (just a unit delay) with the progression of:

The idea here is that the *total* inductance and capacitance is the same, you've just spread it across more and more sections. What you'll find is that these models behave as reasonably close transmission lines (pure delays) at higher and higher frequencies as you add sections. In fact, doing this experiment using physical inductors and capacitors was a popular transmission lines lab exercise... at least when I was in school!

The above can also be re-cast in terms of digital signals where you typically make the 10-90% step response time through any one section no more than perhaps 1/5-1/10th of the input signal's actual rise time.

Another favorite past time (at least before microcontrollers and memory and ADCs and DACS all became dirt cheap) is to start turning the inductors into gyrators and try to build long delay lines out of op-amps for use in, e.g., audio effect boxes.

Ahhh... So if 10cm of the specified trace on the ground plane equates to C = 14pF and L = 3uH

then using this strip model (transmission line model) with a pulse gen and load...

pulse > ---- L ------>Hi Z load (CMOS input) | | C/2 C/2 | | Gnd Gnd

..It looks like this can have severe ringing... Isn't this also called a pie filter..?

Termination or impedance matching (filter dampening?) comes to mind to stop the ringing. I guess this is where knowing the solved Zo becomes useful.. I think you posted a characteristic impedance of 47 ohms for this trace.

So to stop the ringing.. Rsource needs to be 47 ohms and then the CMOS input needs to be loaded by 47 ohms.

Aside from the 50% signal loss, invalid CMOS levels and a hot pulse generator...the great is the 10cm strip acts like it's not even there....if I got that right..

If R1 is close to the driver and equal to the line impedance, you get a perfect 5 volt step at the receiver, no problems, no ringing, no static power dissipation.

I think I read somewhere that open ended transmission lines can reflect.. I haven't given it much thought yet and don't know if it's a digital concern.

I'm wondering if PC motherboards use some sort of termination for long PCB traces passing high speed digital..?

Yes, but this is due to your pulse having a very fast rise time. If you want to use pulses, for a given rise time make the delay through each L-C section around, say, 1/10th of the rise time and then you'll give a reasonable facsimile of the pulse at the far end.

Yes it is (albeit spelling "Pi" as in 3.14..., not "pie" as in "tasty treat that's calorically dense"). This is telling you that if you take a transmission line (like a length of coax cable), at low frequencies it will just behave like a low pass filter.

...and the rise time of your pulses need to be slow enough that the number of L-C sections you use is a fair approximation of a real (pure delay) transmission line.

In the ideal case, yes -- the 10cm strip acts just like a time delay. In real circuits there's always those little parasitic bits that get in the way (and there's loss that's a function frequency and eventually becomes significant), but they can sometimes either be neglected or "fixed" in a brute-force manner (e.g., by paralleling a termination resistor with a diode to either rail, thereby preventing overshoot and undershot... often people get this feature "for free" due to the ESD diodes attached to most IC pins these days).

Yeah, but there's an awful lot of utility in treating components (and traces) as lumped elements! The way circuits and t-lines/EM are taught in college these days, many people come out without a particularly strong understanding of how the two merge together: That Ohm's law and the definitions and inductance and capacitance come from quasi-static solutions to Maxwell's equations where, strictly speaking, you're assuming that either the speed of light is infinite or that your entire circuit all occupies a single point in space. Having a good idea of how the two merge is quite useful, especially for microwave designs where there are both distributed and lumped element design techniques in use.

When I was taught all this stuff some years ago, the point was also made that IC designers generally work with transmission lines that are lossy enough than an R-C model is generally the most useful... and how in many ways R-C lines are nicer to work with than L-C lines. (There's also the point that someone makes here every year or so about how stuff like RG-58 is actually a lot lossier than most people assume and an L-C model really isn't accurate at audio frequencies.)

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