Hooked up a load (not a very stiff load, the filter choke is barely in continuous current mode) to my SMPS test circuit and the signal generator to the PWM input. A square wave shows reasonable rise time, slow (RC) fall time, and...no overshoot whatsoever!?
Tim
-- Deep Fryer: a very philosophical monk. Website: http://webpages.charter.net/dawill/tmoranwms
What were you attempting to test? Working into a fixed impedance is hardly a trial (unless you're talking anout an SMPA), though it gives some indications of modulator response for the one static line/load condition.
Response times without ANY overshoot may be over-damped, or even totally decoupled from the output.
Suggest you pulse-load the output and look at output response times, deviation and damping at differing input voltages. Then pulse the input voltage, monitoring the same output characteristics at differing load currents.
RL
Open loop response (for some arbitrary load).
Would love to, don't suppose you have any 30V, 250W MOSFETs on hand?
I have a few IRFZ46N's but I doubt I can sink enough heat off of them to test this thing to full load.
Which reminds me, 10A peak primary current doesn't make the FS12KM's very happy... got two shorted MOSFETs and one very flaming gate resistor today :o)
Tim
-- Deep Fryer: a very philosophical monk. Website: http://webpages.charter.net/dawill/tmoranwms
Pulsed loading need only stress the pulsor in relation to it's duty. Peak current in the pulse is most simply sey by a series limiting resistor.
So all you need is a mosfet rated at 30V nAmps, and a resistor of V/I ohms. power rating Dx peak pulsed value. 3W @ 1%, 30W @ 10%.
Small signal pulse generators to drive the fet gate are useful to have around the lab, and not expensive in hobby kit form. Even 60Hz rep rates are easily visible on most scopes. A simple, buffered, RCD CMOS inverter oscillator is easily constructed.
You have fet failures. I don't think it's going to be due to a well-controlled 10A conduction event.
RL
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