serial communication

Hi Raseel. Serial transfers are not inherently any faster than parallel. If you are referring to IDE hard disks and the "Serial ATA" specification, then that is just another industry "gimmick" to sell a product. (P.S. Serial-ATA is supposedly very buggy.) SATA is an improvement in technology only in terms of speed. Serial and/or parallel data throughput depends on two things: clock speed vs. bus width. Obviously, a serial clock has to be higher than parallel clock to have the same throughput. If a serial "frame" or transmission can send 1 byte in 125nS and a parallel connection can send 8 bytes in

1uS, then the operating speed is the same because each sends 8 bytes in 1uS. If you raise the serial clock, that becomes faster. If you raise the parallel clock or add more bits (pins, width), then it will be faster.

Or was your question specifically about the protocol framing in serial transfers? If so, what type of serial data?

-M

you are referring to IDE hard disks and the "Serial

product. (P.S. Serial-ATA is supposedly very buggy.)

parallel data throughput depends on two things: clock

clock to have the same throughput. If a serial

send 8 bytes in 1uS, then the operating speed is

that becomes faster. If you raise the parallel clock or

I think you are missing something important here which, if you understood it, would not permit your "gimmick" label to be so readily emitted. I will also venture that you have not personally had to push the limits of timing to get data moved quickly.

Under that assumption that "all things happening at X Hz are equally hard", your transition from single-serial to parallel-serial makes some sense. But getting a data stream from a sender to a receiver with an embedded clock at X bits per Second is much easier, (in the realm where it is hard at all), than doing so with N data streams with an accompanying but not embedded clock at X words per Second. Rather than explain all the gory details of why that is so, I will leave it to your imagination. Of course, if you have no inkling about this, you should simply withdraw your snarky comments. Here is a clue from which to start building your new understanding: Propagation delay variation between devices, especially when they are on not on the same die, can easily consume most of the timing margin in a high speed design.

Naturally, once the problem of getting a single stream of bits transported is solved, aggregate speed can be increased by doing the same trick in parallel. And that is exactly what is being done with PCI-X and similar movements. But you do not get to call such arrangements "parallel" in the sense that they negate the serial aspect of the data flow. The data do not arrive (in parallel) at the same time, nor do they have to in order to be accurately received and reassembled into words.

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--Larry Brasfield
email: donotspam_larry_brasfield@hotmail.com
Above views may belong only to me.

What do you mean by "faster?"

In order to have a given data throughput, a serial bus has to have a faster clock speed than a parallel one with the same throughput, obviously, so in that sense it is faster.

But if speed is measured in megabytes per second, then all the really fast buses are parallel. Memory buses are a good example.

What we are seeing nowadays is that buses which have to go off board are often serial. This is to reduce wire count and to help maintain signal integrity, not to boost speed, per se.

--Mac

I think, raseel just simply compare something likes USB vs. LPT or SATA vs. IDE... and draw that conlusion.

One thing would like to mention, all recent serials use differential tricks (LVDS, LVPECL...) to transfer data, that's why they can achieve so high rate, this trick can also be used in parallel such as ULTRA SCSI (320??), raseel, have you heard of this?

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It isn't.

Serial, is _not_ faster than parallel. If you have a single communication 'wire', operating at a particular speed, adding a second wire (in a sense going 'parallel'), immediately doubles the potential data transfer rate. The costs of doing this, are adding an extra pin to every connector, an extra line driver/receiver for every wire etc.. The alternative way to double the rate, is to increase the clock rate on the original wire. The costs of doing this, are the needs to probably improve the wire specification for the higher rate, faster drivers/receivers, possibly more complex line termination, and the need to improve the design around the line to deal with the increased risk of higher frequency interference. What has happened in recent years, is that the possible switching rates from standard semiconductors have got so high, at such low costs, for the circuitry needed to recover the clock from serial data, and convert to/from parallel as needed, while 'mechanical' connectors and wires, have remained relatively expensive, that the balance of economy has tended to move towards a higher clock rate 'serial' solution, being marginally cheaper in many cases than a 'parallel' solution. Combined with the advantage of thinner wires, serial solutions, have therefore become popular.

Best Wishes

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Homework?

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Rich Webb   Norfolk, VA