Semiconductor fabrication question

Sure, but so what? Annealing is what the OP wants. I wouldn't bet any important money on his succeeding, but it sounds like a fun project, and we should at least make sure he gets good info.

The impurity diffusion rate is greatly increased at high temperatures, which is why you have to do *rapid* thermal anneal (RTA) if you're making devices. Times of 60 to 120 seconds are typical, with ramp rates of 10-50 degrees per second.

I use an 1125 C RTA as one of the steps in making planarized silicon-on-insulator optical waveguides. (I'm not a processing expert--I did this on the advice of a guy who specializes in shallow trench isolated CMOS, to make sure all the various SiO2 layers were really homogeneously fused.)

Cheers,

Phil Hobbs

But he did not want to anneal everything, including the substrate. It will not be the same structure afterward. Of course, he can mask and etch them out, but not simple annealing.

Out of curiosity, what do you think annealing does?

Cheers,

Phil Hobbs

Turning the top layer as well as the substrate (through a metal layer) into polysilicon. How do you propose to stop the substrate from 1000C through the metal layer?

Sorry? What does that mean?

Cheers,

Phil Hobbs

He is putting a thin layer of silicon on metal on silicon and hoping to get polysilicon on metal on silicon. I am just saying that he will get polysilicon on metal on polysilicon.

Annealing won't turn single-crystal silicon into poly. Single-crystal boules are pulled from melt--which is quite a bit hotter than anybody's anneal. The longer you anneal, the larger the crystals become.

A more pertinent point would be whether the metal is refractory enough not to diffuse into the silicon. Some will, some won't.

Cheers.

Phil Hobbs

Great point! I was concerned about the metal and semiconductor diffusing. The only refractory metal I'm aware of is Tungsten.

Thanks, Anon

Tungsten forms an intermetallic compound with silicon, but I don't know what the required conditions are. I really am not a processing guy, and I've never tried annealing metal-semiconductor structures, so you're probably better off asking Google about what metals to pick.

Designing a process flow to make a particular structure is one of the hardest parts of the job.

Cheers,

Phil Hobbs

Here's a thought, not sure how true. It's difficult to say the mobility of a material since it varies so much depending on a lot of details. Amorphous silicon mobility can range from 0.5 to a few dozen m^2/Vs, and polysilicon at 1000cm^2/Vs. A heavy doped semiconductor has more majority carriers, so it seems to me it will have higher mobility. I read that typically lower bandgap materials tend to have higher mobility and higher bw. So it sounds like higher doped materials tend (perhaps not always) to have higher bw. On top of that, the depletion width decreases relative to the sqrt(N) where N is the dopant density in the schottky diode, so heavy doped means smaller depletion width. A smaller depletion width should mean lower transit times, which would mean a faster responding diode, at least faster through the depletion region.

Anon

Sorry I made a mistake. The mobility decreases when the dopant density increase. Darn!

Anon

The crystalline structure has the lowest energy and given enough time or energetic activation (i.e. heating) will be the ultimate configuration. Polycrystalline silicon has slightly higher energy, and amorphous is much higher. There are energy barriers between those states, though, so it's possible to 'quench' into a higher energy state. The speed with which the system relaxes into the lowest energy configuration is exponential with temperature (~ exp(-kT/dE) so if the temperature is much below the energy difference between the states divided by Boltzmann constant k, the configuration is practically stable (frozen), even if it is not the globally lowest energy state.

The same principle governs the diffusion processes that destroy the doping gradients that make the semiconductor structures, of course, and that's why high T kills the devices. What matters here is the relative speed of all those diffusion and relaxation processes. If you control the amount and profile of the heat impulse, you may be able to get enough of the desired change, without causing too much of the damage.

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Annealing allows the amorphous silicon to crystallize. Having answered the question I thought it OK to make my own 'ignorant' observation/ question. The OP was proposing to evaporate doped Si. As I understood it he was going to purchase a doped Si wafer, put it in an oven and evaporate it onto something else. I wondered if the dopant atoms would boil at the same temperature as the Si? Would they leave first, be carried along in the 'stream', or pool on the surface?

Hey how 'bout laser ablation.

George Herold

On Sat, 22 Nov 2008 09:02:36 -0800, ggherold wrote: ...

You could sputter it (ionic ablation).

Cheers! Rich

To tell the truth, i am not so sure. IIRC if you use a sputtering process you get mostly amorphous Si, but that is convertible into majority polysilicon by annealing. Most vapor phase depositions tend toward crystalline forms, but they are slower.

More difficult to obtain and much more expensive. Also much more expensive to process.

Just the same you may peruse the following if you are interested in diffusion or epitaxy:

and here

Joseph

Diffusion is both temperature and time dependant, not to mention whether or not the diffusion source is in contact with the object material. Most diffusion ovens operate above 650 C and provide continuous dopant supply. There are equations for the solid solubility and diffusion rates if you look for them.

I think ion implantation may be garage shop doable. Not in the least easy mind you, see the MSDS for the source dopants.

CVD is probably too hazardous for urban / suburban garage shop, but then so is diffusion ovens. If the nearest neighbor is at least 1 mile away most anything can be acceptable, but not MIC.