semiconductor drift

Could it be moisture related? FR4 can absorb moisture, a certain % of its weight per month. Maybe put the boards under vacuum and draw it out and look at the difference. Do you use any High impedance resistors in there? Low bias current amps?

Cheers

Everything is low impedance, so I don't think that PCB leakage is significant. I think one of the ICs is drifting. It must be inherent to that IC type, since all 16 channels on two boards are drifting negative.

Calibrated in July or August, returned in December? Could it just be the difference in room temperature?

There, now you have something other than humidity effects to worry about.

Unlikely. The device specs shouldn't allow offsets that big. And all in the same direction!

I was curious about what physics can cause drift in linear ICs.

Sodium contamination at the factory can cause drift. Less likely would be heavy metals. Sodium is a handling issue. Metals are due to defective fab equipment. I don't know if it exists on the internet, but if you could see the scribe channel side profile, it would show the amount of work that goes into guarding the edges of a chip from contamination.

Also a large voltage applied at the input of the op amp (diff pair) can leave an offset. That is why they diode clamp the inputs.

CMOS-input op-amps can develop offset voltages if they see a large differential voltage for a long time (due to movement of ionic impurities, IIRC). Could that be happening somewhere?

Beta degradation with Vbe breakdown could lead to Vos shift if the bias currents were changed enough.

Firmware glitch that cleared out lower bytes of calibration numbers or something like that?

Best regards, Spehro Pefhany

On a sunny day (Wed, 03 Dec 2014 20:27:52 -0800) it happened John Larkin wrote in :

Supply voltage change?

Both the LMH6642 and THS3062 has specified up to 5mV input offset voltage

So with that wide input offset value, do you think a calibration at beginni ng of life is going to fix that drift magically over time?

The parts has defined temperature drift (average), but no lifetime specs

In a earlier employment we did the same. Just closed our eyes for lifetime drift and did calibration at beginning of life (even temperature calibratio n).

I wanted to know more, asked a supplier, got information deep from the IC g uys and the response was that when a part was powered up again, at a later time in life, the offset could be anywhere within the specs (I don't know i f he was just saying that in order not to disclose too much, but it makes s ense that a part with large VOS will have a lot of lifetime drift)

Otherwise, you could just use a LM324 for anything, just calibrate is befor e use....

Cheers

Klaus

LM324s don't actually drift much with time under benign conditions. They do drift a lot with temperature changes.

Probably the DAC since it's current-output style.

Why not have an auto-zero at each power-up? ...Jim Thompson

Do you have any on the shelf that you could compare the returns with? (maybe the original prototype?)

George H.

The DAC is CMOS, so gate threshold shift, from oxide contamination, might conceivably change switch ON resistances.

I doubt that we are zenering the opamp front-ends. As far as I know, the boards weren't even powered up while at the customer.

We chacked tha cal table, which includes cal date/time and a checksum, and it looks OK.

BOTH boards, all 16 channels, are drifting negative!

These opamps are spec'd for offset and for offset tempco, but not for longterm drift. It's rare to have such a spec. My question, for people who actually understand semiconductor physics, is about the possible drift mechanisms.

Seems lot a lot of drift, too.

Sounds like butt-covering.

There's no way to read the output level. We didn't anticipate this sort of drift.

It's not a big problem. I was just hoping someone could explain potential drift mechanisms.

We might do that. Just now, we're experimenting with these two boards. We'll bake one to maybe accelerate the aging (and, hopefully, not anneal the drift out.)

I have seen drifty-type failure mechanisms that could be fixed, for a few months, by baking.

How about showing your circuit - or at least telling us how much opamp offsets would be required to cause its output to change by 10mV?

Here it is:

The overall gain from the DAC diff output, to the final unloaded output, is about 13, so, if the drift is at the front end, it's maybe

We are doing some tests to see who is drifting.

It's not just FR4. Pretty much EVERYTHING absorbs moisture. If the units were calibrated within a day after assembly of the boards, all the 1% resistors will still be settling down. Take a 1% resistor, heat it as if soldering both leads, and then test with a sensitive Ohmmeter for a couple hours. You be amazed at how long it continues to drift! Obviously, there is a mechanism that goes WAY beyond just the cooling off after reaching soldering temp.

Maybe the one time I really did this experiment, I had some truly crummy resistors, but I was STUNNED by the magnitude of the drift immediately after the resistors were back to room temperature, they remained some 10% or more out of tolerance! After an hour, they were close to being back in tolerance, but continued to drift for several more hours, until well within the 1% band.

Jon

And that might just reset the drift back to zero, and start the process all over again.

Jon