Semiconductor fabrication question

What happens if I sputter metal on top of an epiwafer, and then sputter silicon on top of that metal? Iow, would the sputtered silicon that is on top of the metal be amorphous or polysilicon or what?

Thanks, Anon

Reply to
curiousjohn4
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Yes, you can deposit Metal or Polysilicon on wafers. Check with your fab house for details.

Reply to
linnix

The reason for asking is Phil Hobbs said that sputtered silicon on a PCB would result in a layer of amorphous silicon. I want the deposited layer to be doped polysilicon, not doped amorphous silicon. So what if I replace the PCB with an undoped polysilicon wafer? Actually I drew an example of what I want to do. In the following image, lets say the deposited method was to heat a piece of metal inside a vacuum, which would slowly cause some of the heated atoms to fly on the wafer, and next I would use the same method except it would be heated dopded silicon instead of heated metal. This would result in a layer of metal on the wafer followed by a layer of silicon (hopefully polysilicon).

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Thanks, Anon

Reply to
curiousjohn4

Vapor deposit of Polysilicon is standard procedure in any fab house. They have masks for precision deposits of any Polysilicon or Metal on wafers. I don't think they do it on PCB much, although it's possible.

Reply to
linnix

Making poly requires high temperatures (usually about 550 C, iirc). You can do that by high-temperature CVD or by an annealing step after depositing amorphous Si.

Cheers,

Phil Hobbs

Reply to
Phil Hobbs

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Thanks for the info Phil! Slowly, but surely, I'll get it right. I was told CVD is too dangerous for a garage operation. Wouldn't even know where to buy the silane, and would be afraid to handle it. One leak and kaboom!

The annealing step after depositing amorphous Si sounds hopeful for a garage project. I'll start reading up on that semiconductor annealing process, but haven't read about it yet. Sounds like some hope.

May I ask is GaAs easier to get in the crystal form?

Thanks, Anon

Reply to
curiousjohn4

r
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I found the wikipage

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Lets say the junction plate width is are around 1um diameter, the depletion width is very thin at 10nm for heavy doped Schottky, and they are baked in the furnace at 550C to convert the amorphous silicon to polysilicon. Any drawbacks to that process, perhaps enough metal- semiconductor atoms diffusing to result in poor performance?

Thanks for any help and advice, Anon

Reply to
curiousjohn4

So, you agree that plastic (PCB) substrate is out of the question, right?

You will not be able to preserve much of the semiconductor features after annealing, unless you only want a block of polysilicon/metal alloy.

Perhaps I misunderstood what you are trying to do and how you are doing it.

Reply to
linnix

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Thanks. I'm a bit confused why Phil H. would say that I could anneal the chip to convert from amorphous-silicon to poly-silicon if it would destroy the chips properties.

It was said that CVD is too dangerous for a garage project. Are there any other options we have not explored? What about solid-phase crystallization (SPC), or perhaps metal-induced crystallization?

Thanks, Anon

Reply to
curiousjohn4

On Nov 16, 3:36=A0pm, linnix wrote: [snip]

Here's a picture of my first goal

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Note, in the final product, the green (deposited doped silicon) should be poly-silicon, not amorphous silicon.

Thanks, Anon

Reply to
curiousjohn4

No semiconductor structure can withstand 500 degree annealing temperature. In real life, polysilicon is annealed first, then implanted into structures. You need the proper equipment and site to do it. They (the fab houses) usually spend several hundred millions dollars for them.

Reply to
linnix

I've made a lot of instruments that cost me practically nothing that would have cost a furtune to buy. In this case I don't need fancy equipment that's good for mass producing chips. So if it takes a week per chip, then whatever.

I'm reading that if the amorphous silicon is on metal then it requires far less temperature to convert it from amorphous to poly. Yesterday I read that 150C is enough. I know most semiconductor components can stand at least 220C. I don't know how thick the metal needs to be though.

Another option, perhaps there's another method to deposit poly-silicon other than CVD that is safe.

Anon

Reply to
curiousjohn4

As I told Phil Hobbs, the chunk of silicon that is to be heated up for evaporation method is poly-silicon. I don't think that makes much difference.

Why would CVD deposit poly-silicon on the surface, while evaporation methods would deposit amorphous silicon? Perhaps if the evaporation method was kept at an extremely low rate. Perhaps by lowering the evaporation temperature. Of course lowering the evaporation temperature would increase the time required to deposit the silicon.

Thanks for any help, Anon

Reply to
curiousjohn4

I'm sorry, I may have misunderstood your sentence. I would agree that a semiconductor component would not survive that temperature very long because the plastic casing would melt. I just read at wikipedia that CVD uses temperature around 650C to deposite poly-silicon. So I'm guessing that the raw chip without the plastic casings can handle those temperatures.

Phil Hobbs, are you around. Could you please clarify?

Thanks, Anon

Reply to
curiousjohn4

To clarify, when I say "evaporation" I am referring to either method, evaporation or sputtering, whatever method works best. My fault.

Anon

Reply to
curiousjohn4

Here is something describing the silicon junction breakdown at around

200C to 300C. I did not read the detail, but I think it is in the right ball park figure.

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Reply to
linnix

You know, it may be possible that a low temp below 200C annealing process done for a very long time could work over and over might convert the amorphous to polysilicon. It may not be mentioned in the industry because it would be impractical, too slow, but I have plenty of time. In this case the silicon is on top of metal, so that also helps.

Thanks, Anon

Reply to
curiousjohn4

My factory needs 10 to 15 weeks for CVD of a 15um device with 4 masks. How slow do you want to do yours, even if it makes any difference.

Reply to
linnix

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That doesn't sound right. Maybe they meant 10 to 15 hours. I'm reading everywhere that CVD is around 15nm per minute. It would take just over

16 hours for 15um.

I wouldn't need nothing close to 15um anyways. More like 15nm, which would take one minute. I'm willing to wait one week.

Thanks Anon

Reply to
curiousjohn4

Nonsense. Rapid thermal anneals of 900-1100C are common.

Cheers,

Phil Hobbs

Reply to
Phil Hobbs

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