schmitt buffers

There's several possibilities, of course; I had current spikes from a CMOS gate taking out a transistor (2N2222) in the power supply but metering the power supply found very small current. The trick is, even very small average current can have peaks in the exploding-wire range. How accurate was y our peak-hold circuit on that '4 mA' reading?

Also, there are increases in current as temperature drops; the 10 ohm driver at 20C is a bit of a monster at liquid nitrogen temperatures.

Lastly, the CMOS technology of yesteryear had a significant lateral PNPN latchup problem, where a current spike could cause an accidental crowbar on the power supply. One hopes this is well understood and modern design rules mitigate the effect, but what has happened before, can happen again.

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I once had a clever solution--possibly too clever--done by adding a small resistance in one of the power leads. The effect was that the onset of input cross-conduction shifted the input threshold in a positive-feedback direction. Thus, the internal current prods the thing out of the linear range without needing the output to switch.(*)

I'm too punchy to work it out again right now, but maybe this hint will haunt you into reinventing it.

Happy hunting!

James Arthur

ramps.

Hmm...Arthur's last theorem....?

Cheers

Phil Hobbs

Well, of course, this is a difficult measurement. I had a board with 3 of these single-gate components for each channel, with a power island for each channel. There were power decoupling caps and a small resistor, like 10 or 22 Ohms to isolate from the main power plane. I was able to see a significant dip in the +5 V supply, several hundred mV when the outputs switched. Now, I KNOW that inductance in the decoupling caps and the plane made the result seem worse than the actual current spike. But, on the other hand, I was using a 500 MHz bandwidth digital scope that likely attenuated it, too. So, by reading the slope of the voltage dip, I estimated the current that would have caused the dip at such a slope.

Certainly a VERY rough measurement, but the best I could do with the equipment at hand. Also, this was either 2 or 3 chip's outputs that were transitioning, depending on the conditions that were set up.

Anyway, using the old circuit at 5 V with the 74LVC parts, the dip was VERY easily seen, using the 74AUC parts with a slightly different circuit because a 3-input NOR is not available in that family, no voltage dip could be seen at all. And, the crosstalk condition that was the original symptom of the problem was also totally gone.

Jon

Meant the RC bypass trick won't isolate the input stage shoot-through current from the supply rail in case of slow (almost DC for John) inputs.

I wrote that on a math test paper once when I was stuck.

Turns out the marker had no sense of humour...

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Oh, not the last--plenty more where that came from... :-)

-- Cheers, James Arthur

Possibly a sensitive subject amongst mathies.

I've been interested in the CMOS schmitt shoot-through problem forever, ever since a few micropower applications. Most of those solutions have been slow though, such as front-end discrete amplifiers, schmitts, PUTs, etc.

I biased some early 74AC logic samples linear with a 1M feedback resistor. The result pulled enough current to sizzle and fry itself in short order.

Sensing the shoot-thru via the power lead has promise, but I still don't remember the exact notion I'd had...

-- Cheers, James Arthur

Building a fast Schmitt with low power consumption is a fundamentally hard thing to do.

John

Right, but it does smooth them out. That makes them palatable for a shunt regulator if still needed. Most cheap shunt chips can't react to the fast snaps that occur when the output swings and the positive feedback resistor rapidly muscles the input stage to another cross current value.

I don't need fast by modern standards. While faster is better, anything sub-microsecond would work OK. My main issue is getting really really good static-state output saturation, like 10 microvolts at 1 microamp. I think the faster opamps and comparators have too much static current to do this. I already have it working with an opamp for the schmitt bit and a LVC17 tinylogix for the low sat driver. But I am sure there must be a neat one-part solution somewhere. Will look at micropower comparators when I get the chance to do some more tinkering. This weekend hopefully.

Would an OpAmp-based schmitt trigger help as a front-end?

Pere

Some opamps draw a lot of current when railed.

John

Absolutely, tried it and it worked well. I'm still thinking there is a cheap magic part that will do it in one. Some single-gate variant or micropower comparator say.

Only a beefy RR-opamp or comparator would. Possibly also some line receivers. But you'd have to translate your word "cheap" into Dollars, and mention at which yearly quantity :-)

gin

The only time I ran into this problem, I didn't need fast - it was back around 1975 - but I rapidly worked out that I couldn't use a CMOS- logic schmitt without running the risk that the wrong input voltage would let it blow itself up, and designed a standard two-bipolar- transistor Schmitt to do the job. That had a predictable - and pretty low - maximum power consumption, and was tolerably fast.

If I were tackling the problem today - and need something tolerably fast by todays standards, I'd be tempted by a two or three bipolar transistor solution built with 5 GHz broad-band transistors, like the NPN BFR92 or the PNP BFT93.

I even published - a rather specialised - example back in 1979.

Ghiggino, K.P., Phillips, D., and Sloman, A.W. "Nanosecond pulse stretcher",Journal of Physics E: Scientific Instruments, 12, 686-687 (1979).

-- Bill Sloman, Nijmegen

You have to be properly fermented or formatted, or some combination, to get that - at last.

Ed