The processor has a fairly simple life.
Mode 1) We want to take data in quickly over USB at about 1 Mbyte/sec to the CPU, decompress it by a factor fo about 4, and save it. The buffer can be >1GByte Mode 2) We take data out of memory and send it to a custom interface at around 6 MBytes/second. I would expect the processor to be able to mediate these transfers.
Using things we've used before, I could stick a Cypress FX2LP in, and use the GPIF interface for the bulk end point transfers via a modest FIFO to the CPU. However, that leaves me with finding a clean way of handling the End Point 0 transfers. Some would be handled by the Cypress itself (those concerned with programming the Cypress, or operating USB), but others need to go to the CPU and processor/processor interfaces can be awkward (Cypress is an I2C Master).
When I started looking at ARM with >1GByte memory access, they tend to come with everything else (Ethernet, CAN, compost heap, coffee maker, etc).
Have I missed something in the confusion?