Is there any kind of 'bible' reference for semi-automated test fixture design or is all this stuff embedded in supplier data and internal company lore?
This kind of thing:
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(pneumatic actuated bed-of-nails)
Primarily interested in the mechanical part of the design such as location tolerances and location features on the PCB, and test pad sizes using the common sizes and end details of pogo pins etc.
Ages ago, a firm I was with would make a test fixture for every board we designed (quantities were low -- thousands -- so we could afford to do in-house testing as part of the normal manufacturing cycle).
We'd purchase a "press" -- a sort of clamshell affair into which the DUT would be sited (using reference holes in the PCB). Pylon/pogo pins mounted into the clamshell would make contact with the circuit at key points for the test procedure we'd designed. Having the capacity in-house made it a lot easier (cheaper) to respond to manufacturing problems quickly, instead of having to ship boards off to be tested, shake-n-bake, etc..
But, this was in the days of multilayer thruhole technology. The pins were physically large (to be robust enough to handle the repeated abuses). There may be a finer-grained technology available, nowadays. But, I would imagine the resulting fixture would also be considerably less "forgiving" (of the types of folks who would be slapping boards in and out, all day long).
Can you, instead, reduce the number of such "test points" and use a connector (even if unpopulated) to exercise the circuit? This is the approach I've taken with my recent designs as there are, otherwise, way too many potentially "interesting" points to probe via ATE.
The testing I use is functional using the existing connectors on the board. The test fixture contains enough circuitry to fully exercise the DUT. In the case of the design I'm presently building 10,000 of this means an FPGA to stimulate the digital control and network side digital interface, an RS-422 receiver/driver for the I/O side digital interface and a loop back for the audio interfaces. The RS-422 interface gets tested easily through the FPGA and the audio circuit is tested as part of a loopback audio test at 20, 1000 and 20,000 Hz for frequency response, noise and crosstalk.
A bed of nails or clam shell tester would still require the design of a test circuit unless a very expensive generic test device were used. I think I paid $1,000 each for five test fixture boards 13 years ago before PCBs were so inexpensive and easy to get from Asia (and considered reliable). As it was, Sunstone did a terrible job with many open vias, some of which did not present until after the boards were in use. Today this would probably have cost more like $200 -$300 each assembled.
I can't see a need for a bed of nails or clam shell tester unless the tests have to include measuring intermediate points that simply can't be observed externally with the existing I/Os. Designs should be done to not have such issues, but I can see where that may be inevitable in some cases.
we usually have test point for pogo pins for everything that needs probing, because sticking a pcb in a tester with pogo pins and hitting "test" is faster and less error prone than having to plug an unplug connectors that also wear out
The usual method (AFAICT from dealing with test engineers) is to make a PCB with Mill-Max cage jacks, then a Delrin plate with matching holes to support the pogo pins, whose tail ends go into the cage jacks so that the pogos can be replaced easily. The Delrin has counterbored holes to locate the pogos axially, so there's no sliding wear on the cage jacks, which therefore last a long time.
There's a spacer round the outside to keep the board at the right Z position as well.
The whole works goes on a piece of aluminum jig plate with four dowel pins, and the top is held down with a lid like a waffle iron.
Minimum test pad size is typically 1 mm, and the method works best when the pads are on the back of a one-side-stuffed board.
We do pogo fixtures, but we just sort of do it. This one lets us test a little board before we glob-top it.
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The black block is machined delrin, and the white base was 3d printed.
PCB bare-board testing is mostly flying probes these days, not bed of nails. Looks like automated test is going flying probes too. That leaves the top side accessable. Finding component-level defects could be interesting software.
We lose too many boards to probe slips. I'd like some sort of pantographic, solid probing system for engineering tests.
With newer packages (finer pitch, BGA, etc.) you have to deliberately bring each "point to be probed" out to a spot on the board where you can locate a genuine testpoint -- and may have to turn the crank on the artwork to create such a testpoint!
Older throughhole technology made this simpler -- you could revise a test fixture to site another pin and "find" a convenient place on the *existing* artwork to grab a signal that would tell you what you wanted.
The connector on the *tester* is the item that sees the most wear. So, you make *it* easily replaceable.
We test disk drives at one of the non-profits with which I'm affiliated. Back in the days of IDE drives, this meant mating a ribbon cable to each drive, running the test, then removing the cable. When you are doing hundreds a week, it's not hard to end up with a failing connector ON THE TESTER. So, you simply replace that length of ribbon periodically as a preventative measure (we've got almost as many of those cables as we do drives -- as each drive came *with* a cable!)
You can also just create a connector *site* and let the fixture probe the "pads" of an unpopulated connector.
But, as with deliberate test points, you have to know which signals are GOING to be of interest when you layout the PCB. And/or add smarts to the tester to be able to exercise and select signals of interest at points that are convenient.
[I designed a sensor array that would detect the introduction (by a lab technician) of blood samples -- 10uL -- into any of
60 "wells". It's easy to test that the design *appears* to be working. But, verifying that each well will accurately reflect a 10uL "load" requires some physical assistance (you can't simulate a 10uL water mass electronically). As the board would be potted (sterilization) once tested, it's kinda important to know you're not potting something that needs to be fixed!]
Yeah, but you need the room for the test points. There is literally no room for any additional test points although there are a few I put in for debugging.
Also, don't you need test points for all the I/Os on the board? This test is going to be on a board that is powered and operational, no? If your design has a high I/O pin count it would require all those I/Os to be on probe points. That can be a lot of space on the board.
Quantities are not huge at all, and testing is simple in this case. A few voltages and currents measured and simulate some input signals. I want to do some cool things like produce a .pdf test or "conformity" report for each unit loaded right up onto the server via Wifi and tied to the serial number. Should be easy with Python on a Rpi.
Right now I have a Tag-connect on the bottom of the board for programming and those pads are bit close together (pad diameter is
0.787mm (31 mils). They have 3 locating pins to fit unplated holes right there, so they work okay.
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I'm pretty confident of hitting an old-school 0.1" pitch 0.9mm hole with a conical probe but not so much half those tolerances.
I did that with my disk drive tester and laptop tester. Let the actual device talk to the tester (via enet) and exercise code loaded from the tester. When done, tester talks to RDBMS to log results of test. Print any sort of "receipt" you want...
Can you route signals to a "tab" that is later snapped off the board? If you are only using this for manufacturing test (and not repair depot), you don't care if the connector/connection-points remain with the product thereafter!
Yeah, that's the problem I see. If you're trying to make something
*tiny* (my boards are 1.25 x 2.5" -- and components up and down!), leaving space for a probe gets "expensive".
[Thankfully, my boards "stack" via connections around the edges. So, as long as all the "interesting" signals go off-board as part of this process, I can capture them there!]
The "presses" were reasonably well made -- it's not like there was a lot of slop in the mechanisms. But, tolerances accumulate, esp when you have "people" operating the mechanism.
[I worked on a 600-pin tester many years ago. Each pin was a ~0.1" pitch coaxial connector. Put 600 of them together and you've got one helluva BIG connector assembly (to the DUT). Motor driven screw-drive mechanism to *pull* the DUT into the connector. No room for error. But, lots of money to ensure that! :>]
We seeded our little mouse-bite board with about a dozen test points,
28 mil OD pads with 20 mil drills. The board just snaps onto a bunch of conical-point pogos, but we included some guides to help. We push a board down, hit a foot switch to power it up, look at a scope, and it's tested.
This is all low impedance stuff, so we don't worry about leakage from blood.
Not sure what you are describing. By DFT I assume you mean some sort of mux on the inputs to accept a loopback from outputs. Two problems, one is it requires a balance between the input and output and the other is it adds circuitry to the board or required a connector which is what we are trying to avoid using. Why not just use the durn connectors that are on the board?
I posted links to the top and bottom layers the board I'm currently building. Literally no room for added pogo pads. The only issue with using the designed in connectors is they aren't easy to remove. That reminds me I need to have a tool designed for that.
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