>Along the lines of the question regarding LTspice logic levels...
>
>PSpice has a number of nice digital stimulus "parts", but they kick
>out _very_fast_ edges at 0-5V logic levels when connected to analog
>parts.
>
>So, in this past week, I have created some stimulus-level-to-analog
>parts with adjustable levels and rise and fall.
>
>Likewise analog back to 5V logic.
>
>That way I can patch in 74HC stuff just for behavioral analysis...
>speeds things up before I go full device-level in the chip design.
>
>Any PSpice users that are interested, I'll send you copies for your
>symbol libraries... PSpice Schematics only... Capture sucks the big
>lemon ;-)
>
> ...Jim Thompson
So Jim, You have now entered the arcane world of PSpice digital IO, then!
I was one of the last to try to master this insane area of expertise!
It is amazing how, in the midst of all this digital stuff, how much analog there was below the surface of the digital IO. Some of it was sorta kludgy, where they wanted to map EXACTLY the behavior of some of the digital logic's I/O, so added little etable and evalue expressions to it.
So, have you also needed to increase the frequency response of the digital sources, yet? I remember figuring out how to do so in my first few weeks at MicroSim for some customers down at AMCC so that they could model some new ATM chipset outputs and get good eye patterns. They later sent me a tee shirt with an eye pattern on it they were giving out... 8-)
Charlie-- Charlie Edmondson Edmondson Engineering Inc