Re: My Vintage Dream PC

May 22, 2009 478 Replies

Of course. But I said "the average" user. Of the computers that I see, not one in twenty has Photoshop. (If there is a high-power app, it's likely to be a game.) Sure, some people do video editing or CAD, but not that many (audio recording and editing doesn't require all that much power, a 378M P3-500 is adequate for that, although some transformation operations are opportunities to go get another cup of coffee).

Sometimes, for certain values of "good". Though I'm not convinced that the horsepower:results ratio of Word 2007 is superior to that of WordPerfect 5.1.

It's *not* always just used to "pump up" the eye-candy.

Not always.

Dave

You don't know anything about CML, do you? You just fling words around and pretend to know stuff.

We actually use some CML parts in some of our products. Care to guess what the functions are?

JOhn

You couldn't walk around inside a 3D model, either.

John

Does C++ mean "faster than light"?

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Still waiting for Intel to start making a 36-bit Pentium?

John

Because this isn't the auld days, and because I'd design it that way. I do design computer systems, hardware and software.

Do you ever have ideas any more? Have you ever written an OS? Do you think things won't change in, say, 20 years?

John

These are all extremely rare events (i.e., not on the order of thousands of times per second). So "never" again wasn't quite accurate, but the point is that the requests for new resources don't happen enough to be considered as part of the load (if you're going to have hot-swapping you do need to make sure it all works -- but it isn't part of why this organization doesn't make much sense).

The issues in microkernel vs. more conventional organizations have nothing to do with small vs. large computer thinking. If anything, it's easier to see a path to things like upgrading and restarting services as necessary, and isolating bugs to ensure multi-year uptimes, with a microkernel than with a modular OS. Not any easier to actually get there, but easier to see the path.

Making some bits reentrant (while, naturally, leaving interrupts enabled) adds failure modes that have to be thought out carefully. I seem to have got them right, but taking risks without substantial resulting benefits is never good design. Taking risks for the fun of it is insane.

John

Yeah, and to me it looks like C, to someone else it looks like Pascal, to some it looks like COBOL - reminds me of the 7 blind guys and an elephant. ;-)

Cheers! Rich

You have now moved into hardware design. Since it is even lower than assembler that needs a high level language.

Andrew Swallow

John Larkin wrote: [snip]

Lets just say we did not ask for multi-core.

Now about the shortage of ram and disk space ...

Andrew Swallow

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What do you think VHDL is?

VHDL is actually modeled on ADA, clearly a higher-level language than C. But VHDL is not a procedural language - everything happens all over the place - which can really confuse some people. Crossing clock boundaries is even more fun.

But hardware design, especially analog and mixed-level design, is hardly "lower" than programming. A processor and its code is just a piece, often a grunt-work piece, of a serious electronic instrument. And the damned things are noisy.

John

Unless we say that current computer systems are good enough - and jump off the Moore's Law + feature-itis treadmills - that's the way computer chip designs are headed. OS designs will have to deal with it.

We're now designing an embedded instrument with 2G of ram and 1T of striped hard drive... barely enough to keep up with the data we'll be generating. Fortunately, the physics limits the amount and rate of the data, unless there's a breakthrough in superconductive magnet design.

I'd love a system with 1000x the compute power of my dual-core Xeon, so I could have component value sliders on my Spice simulations and see transient responses change as I move them. Well, maybe 50,000x.

John

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It *IS* a high level hardware design language. It is procedural (see: PROCEDURE) where necessary. Yes, it is concurrent, as it must be to model hardware. Confusing programmers is easy. ;-)

"Lower level" less work "Lower level" =3D=3D less abstaction

By its very nature it will have to be both a fixed size and at a fixed location with one record for each core. Only adding more cores will increase the size of the block. I would guess the block would be at location 0 in ram.

The idle cores probably will spend their free time inspecting their control record. It will be nice if the cache can keep the reads off the internal data bus.

A communication line needs a register at both ends. The OS core gets one for each core.

Core to core communication may need a similar arrangement.

You can complete you memory cycle so the data and instruction busses are clear. The normal action on the watch dog timer for the OS core going off is to restart all the cores. Some debugging information may be kept but that is it.

Why not? It is basically the equivalent of reading a program off a disk. That is not particularly urgent.

Thats life.

Andrew Swallow

Very High Density Logic? ;-)

Cheers! Rich

As soon as somebody comes up with a stable chip design, some Linux geek will be all over it like a cheap suit. ;-)

Cheers! Rich

So, go buy one:

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;-P

Cheers! Rich

Yup. Linux may be the first OS to do what I like, which is to dedicate a core to the OS. Linux aready has the GUI outside of the kerna/e/l, and sometimes the file systems, too.

John

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