Re: My Vintage Dream PC

Sorry, but you guys need to catch up with what the English language has evolved into as well. Hint: It ain't Brit mode English.

Nope. True CORE memory holds its state across power failures. And RAM memory may well come up in a random state.

Pot ... Kettle ... Black - and don't take the black color remark as anything more.

An old joke punchline is appropriate for you here Archie. To wit:

"F*ck You!" ... Tennessee Williams

Should have said: And SEMICONDUCTOR memory may well come up in a random state.

RAM is just a bit generic. :-)

Since you submitted a timely correction, we'll also overlook that "RAM memory" is a parallel construction to "PIN number", "TCP protocol" or "LED diode".

re:

Tech is the UK's industry of the future

and computer conferencing is the new, new thing ...

Noel Quinn, head of commercial banking in the UK for HSBC, said: ?Industry, skills and technology such as social media and social networking, created during economic hardship, are destined to become the tools of the trade for many of tomorrow?s businesses.?

... snip ...

other related posts in this thread:

somewhat result of getting blamed for computering conferencing on the internal network ... a researcher was paid to sit in the back of my office and take notes on how I communicated; they also got copies of all my incoming & outgoing email as well as logs of all my instant messages. besides a corporate research report, it was also used for a stanford phd thesis (joint between language and computer ai), as well as some number of papers and books. misc. post posts related to computer mediated communication

OTOH transistor transistor logic actually makes sense, not all repetition is is wrong.

And most hardware initializes the ram to a known state (and on some it does it to start out with good ECC).

Some to all one's... some to all zeros, some to the address of the ram written to the ram as data.

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Really? What state do you think it would be?

Back when I was more current on DRAM, half the bits would use 0V to represent 0 and half would use it to represent 1 to better balance power requirements.

While it is in "PullPower Cord" state, there will be no logic levels. If you apply a device to read them or re-energize the unit, you are no longer in "Pull Power Cord" state. My sess still sucs.

I have ECC RAM. It is not for correcting power outages, it is for correcting occasional bit errors, and only then below a certain number of them in any given instance, and with a threshold on how many in sequence can be off as well.

When the power is off, ECC RAM shuts off too. Even "good ECC RAM".

Any reasonable description of changing the state of memory has it still changed after the instruction is complete. If the data is back when you plug the cord back in, it wasn't zeroed. Of course.

If all were filled with (and being filled with) bytes, it would be random aggregation regardless.

Grasshopper?

Moreover some DRAM does this as well.

Then again, it may not, as some recent tests have shown.

I was discussing some common DRAM and as well as much CMOS SRAM.

I already said most of that. :-)