Re: Ideas for Design ;-)

Could be as simple as a single resistor in parallel with the LED... depending on the softness of the V-I plot for an LED. Other add a PNP transistor and two resistors. Final form left as an exercise for the student ;-)

What is surprising is that ED Magazine's editors thought it novel enough to publish it. Based of stuff I've seen there previously, they may be hard up trying to find submissions ;-)

I just enter whatever I want at device level onto the schematic. Although the foundry for my present project has a fairly complete library of parts I just plunk down on my schematic ;-)

...Jim Thompson

"Jim Thompson" wrote in message news: snipped-for-privacy@4ax.com...

Ah, I think I've got it. Definitely simpler than adding another power supply.

Lucky man!

---Joel

Just need NOR

or just NAND.

Much better stated and useful than what I said; thanks Flipper.

ere

ore

gate"

Actually, the P fets are not the "not' of the N fets. Seems like B high and C low crowbars the the supply.

Come on now Miso, You done gone and divulged the secret fuse blower function ;-)

...Jim Thompson

in

he

where

any

teel

r more

ic gate"

=A0 =A0 ...Jim Thompson

=A0 | =A0 =A0mens =A0 =A0 |

=A0 | =A0 =A0 et =A0 =A0 =A0|

=A0|

=A0 =A0 =A0 |

There are not a lot of CMOS gates that are not duals regarding P and N, so this circuit got on my radar. I quit at the first short, but there could be more. Off the top of my head, I think the gated inverter is the only logic circuit where the P fets are not the not of the N fets. Well, for static logic at least. Also one type of Schmidt trigger comes to mind. [I prefer the dualing inverter Schmidt trigger, but there is that circuit where you jam current between series devices.]