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Re: ESR Meter - Roll your own - ESRrev0.JPG

"john jardine" wrote:

John Larkin wrote: >> Something roughly like this, maybe. This is a 2-minute hack, so >> don't jump all over it right away; a real design would take more >> time. >> Basically, it's an oscillator that dumps current into the cap, >> and a synchronous detector to remove most of the orthogonal >> component. It ain't perfect, but should be a lot better than a >> scalar measurement. >> John > This was built along similar lines. The synchronous rectification > is not perfect due to phase shift in the forward signal path but > the arrangement is useful for reducing the annoying capacitive > quadrature component from Q's up to about 3 (at the 100kHz). It's > usable down to the milliohm area and proved the (cheap) 1000 off > 10uF cap's I bought, had an ESR of between 1 and 3 ohms!.

Hi John,

Do you mind if I make some comments? The 1 ohm resistor, R5, can be removed from the circuit. It is at a virtual ground node and has little or no voltage across it. So removing it has little effect on the circuit.

With R5 gone, and the ESR range switch in the 1 ohm position, the 180 ohm resistor, R4, is effectively in series with the capacitor under test. The op amp merely changes the location of the ground node, and inverts the output signal polarity.

Since R4 (180 ohms) is now in series with the capacitor, it completely swamps out the internal ESR (0.05 ohms.) This means the series combination of C, L, and R has negligible "Q", and there is no quadrature or orthogonal component in the circuit.

However, as the ESR decreases, the corresponding voltage drop that we are trying to measure also decreases. We no are faced with the problem that the di/dt from the inductor is much larger than the I*R drop from the ESR. This means the leading and trailing edge of the square wave have large spikes.

If you used a diode peak detector to measure the amplitude, it would respond as best it could to the leading edge spike, which would make it impossible to measure the drop across the ESR. Your circuit and Larkin's share this problem.

Using a synchronous rectifier helps a bit, but you are now faced with trying to turn it on after the leading edge spike, and to turn it off before the trailing edge spike. That could be tricky.

I spent this afternoon looking at these problems in SPICE, and have come to an amazing observation. There is a hidden but very significant feature in the bridge ESR circuit referred to at the beginning of this thread. The links are:

  1. Talino Tribuzio's page, showing the circuit from Nuova Elettronica:

formatting link

  1. Gintaras' web page, who refers to Tribuzio's page in his readme

formatting link

The schematic is at

formatting link

The valuable hidden feature is the bridge configuration completely eliminates the leading and trailing edge spikes due to the capacitor internal inductance. Since the spikes are in phase with the square wave signal on the other side of the bridge, they simply disappear at the output of the op amp!

This means the peak detector has a very clean square wave to work with, and it can give a much more accurate measurement of the signal. There is no tricky timing to fiddle with that can go out of whack just when you need to use the tester.

If you like, I can post the analysis of your circuit and Larkin's version showing the huge spikes that appear as the ESR becomes smaller, and the triangular wave from the capacitance charging and discharging. I don't really see a good way of overcoming these problems.

As I mentioned in previous posts, the bridge circuit has significant advantages, including low test voltage, in-circuit test, shorted capacitor detect, etc. With the extremely clean output signal into the peak detector, it becomes the obvious choice for hassle-free ESR measurements.

I'll post the LTspice ASC file here along with the PLT file so you can see how it works. I changed the bridge resistance to lower values to allow measuring lower values of ESR.

Here's the LTspice ASC file:

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Version 4 SHEET 1 880 708 WIRE -496 -112 -528 -112 WIRE -368 -112 -416 -112 WIRE -304 -112 -368 -112 WIRE -192 -112 -224 -112 WIRE -368 -96 -368 -112 WIRE -128 -80 -160 -80 WIRE -48 -64 -64 -64 WIRE -720 -48 -816 -48 WIRE -704 -48 -720 -48 WIRE -592 -48 -624 -48 WIRE -528 -48 -528 -112 WIRE -528 -48 -592 -48 WIRE -368 -48 -528 -48 WIRE -192 -48 -192 -112 WIRE -192 -48 -288 -48 WIRE -128 -48 -192 -48 WIRE -816 -32 -816 -48 WIRE -160 0 -160 -80 WIRE -160 0 -240 0 WIRE 128 16 96 16 WIRE 224 32 192 32 WIRE 240 32 224 32 WIRE 336 32 304 32 WIRE -528 48 -592 48 WIRE -240 48 -240 0 WIRE -240 48 -448 48 WIRE -224 48 -240 48 WIRE -96 48 -144 48 WIRE -48 48 -48 -64 WIRE -48 48 -96 48 WIRE 32 48 16 48 WIRE 128 48 32 48 WIRE -816 64 -816 48 WIRE 32 128 32 48 WIRE -720 144 -720 -48 WIRE -704 144 -720 144 WIRE -592 144 -592 48 WIRE -592 144 -624 144 WIRE -512 144 -592 144 WIRE -416 144 -448 144 WIRE -304 144 -336 144 WIRE -192 144 -224 144 WIRE -592 160 -592 144 WIRE -192 160 -192 144 WIRE 96 176 96 16 WIRE 208 176 96 176 WIRE 336 176 336 32 WIRE 336 176 208 176 WIRE 208 192 208 176 WIRE 336 208 336 176 WIRE 32 224 32 208 WIRE -592 256 -592 240 WIRE -464 272 -480 272 WIRE -432 272 -464 272 WIRE -272 272 -288 272 WIRE -240 272 -272 272 WIRE -480 288 -480 272 WIRE -288 288 -288 272 WIRE 208 288 208 272 WIRE 336 288 336 272 WIRE -480 384 -480 368 WIRE -288 384 -288 368 FLAG -96 48 DIFF FLAG -592 256 0 FLAG -192 160 0 FLAG -816 64 0 FLAG -368 -96 0 FLAG -592 -48 E2P FLAG -592 48 E2N FLAG 32 224 0 FLAG 336 288 0 FLAG 208 288 0 FLAG 336 32 DC FLAG -480 384 0 FLAG -464 272 VCC FLAG -288 384 0 FLAG -272 272 VEE FLAG 224 32 VOP FLAG 32 48 VIN FLAG 160 0 VCC FLAG 160 64 VEE FLAG -96 -96 VCC FLAG -96 -32 VEE SYMBOL res -608 144 R0 SYMATTR InstName R8 SYMATTR Value {Rb} SYMBOL res -608 128 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R9 SYMATTR Value {Rt} SYMBOL cap -448 128 R90 WINDOW 0 0 32 VBottom 0 WINDOW 3 32 32 VTop 0 SYMATTR InstName C3 SYMATTR Value {C} SYMBOL res -320 128 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R10 SYMATTR Value {ERS} SYMBOL ind -320 160 R270 WINDOW 0 32 56 VTop 0 WINDOW 3 5 56 VBottom 0 SYMATTR InstName L3 SYMATTR Value {L} SYMBOL Voltage -816 -48 R0 WINDOW 0 42 44 Left 0 WINDOW 3 -22 -62 Left 0 WINDOW 123 15 130 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value PULSE(0 4 0 {Tr} {Tr} 5u 10u) SYMBOL res -608 -64 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R5 SYMATTR Value {Rt} SYMBOL res -512 -96 R270 WINDOW 0 32 56 VTop 0 WINDOW 3 0 56 VBottom 0 SYMATTR InstName R11 SYMATTR Value {Rb} SYMBOL res -320 -96 R270 WINDOW 0 32 56 VTop 0 WINDOW 3 0 56 VBottom 0 SYMATTR InstName R12 SYMATTR Value 47k SYMBOL res -384 -32 R270 WINDOW 0 32 56 VTop 0 WINDOW 3 0 56 VBottom 0 SYMATTR InstName R13 SYMATTR Value 1k SYMBOL res -544 64 R270 WINDOW 0 32 56 VTop 0 WINDOW 3 0 56 VBottom 0 SYMATTR InstName R14 SYMATTR Value 1k SYMBOL res -240 64 R270 WINDOW 0 32 56 VTop 0 WINDOW 3 0 56 VBottom 0 SYMATTR InstName R15 SYMATTR Value 47k SYMBOL cap 16 32 R90 WINDOW 0 0 32 VBottom 0 WINDOW 3 32 32 VTop 0 SYMATTR InstName C4 SYMATTR Value 2n SYMBOL res 16 112 R0 SYMATTR InstName R16 SYMATTR Value 47k SYMBOL diode 240 48 R270 WINDOW 0 32 32 VTop 0 WINDOW 3 0 32 VBottom 0 SYMATTR InstName D1 SYMATTR Value 1N4148 SYMBOL cap 320 208 R0 SYMATTR InstName C5 SYMATTR Value 2nf SYMBOL res 192 176 R0 SYMATTR InstName R17 SYMATTR Value 470k SYMBOL Opamps\\\\1pole 160 32 R0 SYMATTR InstName U1 SYMATTR Value2 Avol=1Meg GBW=100Meg Slew=100Meg SYMBOL Voltage -480 272 R0 WINDOW 0 42 44 Left 0 WINDOW 3 47 72 Left 0 WINDOW 123 15 130 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V2 SYMATTR Value 10 SYMBOL Voltage -288 384 R180 WINDOW 0 42 44 Left 0 WINDOW 3 47 72 Left 0 WINDOW 123 15 130 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V3 SYMATTR Value 10 SYMBOL Opamps\\\\1pole -96 -64 R0 SYMATTR InstName U2 SYMATTR Value2 Avol=1Meg GBW=100Meg Slew=100Meg TEXT -528 -224 Left 0 ;'Tribuzio Bridge ESR Circuit TEXT -528 -184 Left 0 !.tran 0 2.2m 2m 100n TEXT 32 -200 Left 0 !.param C = 100uF\\n.param L = 2.533E-08\\n.param ERS =

0.00005\\n.param Rt = 100\\n.param Rb = 1\\n.param Tr = 100n

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Here's the PLT file:

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ [Transient Analysis] { Npanes: 3 Active Pane: 1 { traces: 1 {268959746,0,"V(dc)"} X: ('µ',0,0,2e-005,0.0002) Y[0]: (' ',3,0,0.003,1) Y[1]: ('_',0,1e+308,0,-1e+308) Volts: (' ',0,0,0,0,0.003,1) Log: 0 0 0 GridStyle: 1 }, { traces: 1 {268959747,0,"V(diff)"} X: ('µ',0,0,2e-005,0.0002) Y[0]: (' ',1,-1,0.2,1) Y[1]: ('_',0,1e+308,0,-1e+308) Volts: (' ',0,0,2,-1,0.2,1) Log: 0 0 0 GridStyle: 1 }, { traces: 1 {268959748,0,"V(e2n)"} X: ('µ',0,0,2e-005,0.0002) Y[0]: ('m',0,0,0.002,0.04) Y[1]: ('_',0,1e+308,0,-1e+308) Volts: ('m',0,0,0,0,0.002,0.04) Log: 0 0 0 GridStyle: 1 } }

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Regards,

Mike Monett

Reply to
Mike Monett
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To complete the record, here is the LTspice files for John J. and John L.'s ESR measuring circuits. The capacitor parameters are chosen to resonate at 100KHz, which is also the test frequency.

As can be seen in the transient analysis, there is no evidence of orthogonal or quadrature components in the output signal.

The reason is the external circuit resistance completely swamps the internal ESR. The external circuit determines the current through the series network, so there is no energy transferred back and forth between the capacitive and inductive components, thus no phase shift between them.

The output signal is simply the di/dt from the ESL, I*dt from the capacitor, and I*ESR, which is what we are trying to measure. Both approaches give almost identical results.

You can change the component values in the .param list. As can be seen, the inductive spike is very sensitive to risetime. Trying to measure ESR below about 50 milliohms becomes very problematic with these approaches.

As shown in the parent post, the bridge approach removes the inductive spike, but it leaves the capacitor charging ramp. So it also begins to fail below about 50 milliohms ESR.

However, the bridge approach allows in-circuit testing, automatically detects shorted capacitors, and is insensitive to the polarity of the capacitor.

Here is the LTspice ASC file:

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Version 4 SHEET 1 880 708 WIRE -64 -48 -592 -48 WIRE -32 -48 -64 -48 WIRE -736 16 -800 16 WIRE -592 16 -592 -48 WIRE -592 16 -656 16 WIRE -544 16 -592 16 WIRE -448 16 -480 16 WIRE -336 16 -368 16 WIRE -224 16 -256 16 WIRE -800 32 -800 16 WIRE -224 32 -224 16 WIRE -800 128 -800 112 WIRE -688 304 -800 304 WIRE -576 304 -608 304 WIRE -544 304 -576 304 WIRE -512 304 -544 304 WIRE -496 304 -512 304 WIRE -400 304 -432 304 WIRE -288 304 -320 304 WIRE -176 304 -208 304 WIRE -64 304 -176 304 WIRE -32 304 -64 304 WIRE -576 320 -576 304 WIRE -512 384 -512 304 WIRE -480 384 -512 384 WIRE -352 384 -400 384 WIRE -176 384 -176 304 WIRE -176 384 -352 384 WIRE -800 400 -800 384 WIRE -352 400 -352 384 WIRE -576 416 -576 400 WIRE -400 416 -416 416 WIRE -416 432 -416 416 WIRE -512 464 -512 384 WIRE -400 464 -512 464 WIRE -352 496 -352 480 FLAG -800 400 0 FLAG -64 304 Jardine FLAG -576 416 0 FLAG -416 432 0 FLAG -352 496 0 FLAG -64 -48 Larkin FLAG -224 32 0 FLAG -800 128 0 FLAG -544 304 Vin SYMBOL res -592 304 R0 SYMATTR InstName R2 SYMATTR Value 1e6 SYMBOL res -592 288 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R3 SYMATTR Value 180 SYMBOL Voltage -800 288 R0 WINDOW 0 42 44 Left 0 WINDOW 3 -41 151 Left 0 WINDOW 123 15 130 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V2 SYMATTR Value PULSE(4 -4 0 {Tr} {Tr} 5u 10u) SYMBOL cap -432 288 R90 WINDOW 0 0 32 VBottom 0 WINDOW 3 32 32 VTop 0 SYMATTR InstName C1 SYMATTR Value {C} SYMBOL res -304 288 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R1 SYMATTR Value {ESR} SYMBOL ind -304 320 R270 WINDOW 0 32 56 VTop 0 WINDOW 3 5 56 VBottom 0 SYMATTR InstName L1 SYMATTR Value {L} SYMBOL E -352 384 R0 WINDOW 0 38 42 Left 0 WINDOW 3 36 69 Left 0 SYMATTR InstName E1 SYMATTR Value 1e5 SYMBOL res -384 368 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R4 SYMATTR Value 100 SYMBOL res -640 0 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R6 SYMATTR Value 180 SYMBOL cap -480 0 R90 WINDOW 0 0 32 VBottom 0 WINDOW 3 32 32 VTop 0 SYMATTR InstName C2 SYMATTR Value {C} SYMBOL res -352 0 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R7 SYMATTR Value {ESR} SYMBOL ind -352 32 R270 WINDOW 0 32 56 VTop 0 WINDOW 3 5 56 VBottom 0 SYMATTR InstName L2 SYMATTR Value {L} SYMBOL Voltage -800 16 R0 WINDOW 0 42 44 Left 0 WINDOW 3 21 103 Left 0 WINDOW 123 15 130 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value PULSE(0 4 0 {Tr} {Tr} 5u 10u) TEXT -528 -208 Left 0 ;'ESR Measuring Circuits TEXT -856 -152 Left 0 !.param C = 100uF\\n.param L = 2.5330295910584E-

08\\n.param ESR = 0.05\\n.param Tr = 100n TEXT -816 192 Left 0 ;NOTE:\\nR2 was 1 ohm in the original. It is at virtual ground and has little effect on the circuit. \\nR4 was 56k in the original. Reduced to 100 ohm to reduce settling time for transient analysis. TEXT -856 -184 Left 0 !.tran 0 100.1m 100m 250n

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Here is the PLT file:

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ [Transient Analysis] { Npanes: 2 { traces: 1 {524292,0,"V(jardine)"} X: ('µ',0,0,1e-005,9.99998048950707e-005) Y[0]: ('m',0,0.03,0.002,0.058) Y[1]: ('_',0,1e+308,0,-1e+308) Volts: ('m',0,0,0,0.03,0.002,0.058) Log: 0 0 0 GridStyle: 1 }, { traces: 1 {524290,0,"V(larkin)"} X: ('µ',0,0,1e-005,9.99998048950707e-005) Y[0]: (' ',3,2.025,0.001,2.039) Y[1]: ('_',0,1e+308,0,-1e+308) Volts: (' ',0,0,3,2.025,0.001,2.039) Log: 0 0 0 GridStyle: 1 } } ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

Regards,

Mike Monett

Reply to
Mike Monett

[my pleasure Mike :] The 1 ohm resistor, R5, can be

Can't lose the 1 ohm as the other ranges need it. If you look at the feed current you'll notice with the 1 ohm either in or out, the current to the virtual earth is the same at 20ma. So the 4V signal, 180 ohms has the same drive effect as 20mV, 1 ohm. Switch and wiring hence kept simple.

I'm puzzled. The 180 ohm sees only 0V (the V.E.). The capacitor sees similarly. Currents essentially isolated. Phase changes notified by opamp output voltage.

For some reason LTspice is refusing your .asc text list, so I can't picture where that 'L' and 180 ohms are. Can you repost it as a pic' somehow?. I had a play with my unit and it is sensitive to (a lot) of added series inductance. There's a 5% reading change with 2 foot of coiled test leads (about 200nH). This is basically a 'ring down' (70MHz) at the opamp output and seems related to the opamp stability (the THS is something like 150MHz GB). On the 1 ohm range it is surprisingly difficult to add noticable test inductance without adding serious amounts of lead/wire resistance. Essentially the meter is reading lead resistance with a bit of capacitor ESR thrown in. [Poly cap and s/c link. actual Vout -.063V. Link replaced with 1206 0.01ohms and Vout=0.052V]. As test I've looked for inductive 'spikes' using the 'scope and about 20 different test capacitors (good through to rubbish). I saw nothing untowards. Presumably confirming that capacitors are not inductive (other than the trivial effect of their leads and the test socket wiring).

The test spikes I forced were a transient effect and only occupied a few % of each complete cycle. Yes, a peak detector (without windowing) would have severe problems on such a waveform. The niceness of the PSR is that it can take on allcomers and average the spike energy out over each full cycle. It's not exact, as there's a 15% reading error with Qs up at 2.5. The opamp clips at Q=3 but these are good quality poly' capacitors.

Luxury!. I had a bad cap' problem. Result was a ESR meter. Cost me a day to design and build. I've only used the damned thing once in the past year :)

and have

[...] 

--
Posted via a free Usenet account from http://www.teranews.com
Reply to
john jardine

[ snip ]

John, wrt the alytus.auksa.lt schematic -- I don't see exactly how it can work. Considering its complete symmetry: two 22-ohm resistors to ground and 4.5mA square-wave drive, identically on each D.U.T. pin, there can be no current through the capacitor. Are we looking at the same drawing?

Reply to
Winfield Hill

Win,

If you are referring to

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the right side of the capacitor, the CAP2 pin on J6, goes to ground, and not to the junction of R12 (1K) and R17 (22).

The left side of the cap is connected to the left side of the bridge, at the junction of R11 (1K) and R16 (22).

There seems to be an optical illusion that makes you believe the cap is connected across the bridge, and I made the same mistake the first time I looked at it. But of course, it wouldn't work if it was connected that way.

The cap really is connected from the left side of the bridge to ground.

Regards,

Mike Monett

Reply to
Mike Monett

Thanks, now I can see again! Praise the Lord!

Reply to
Winfield Hill

He is busy on other things, but asked me to thank you for the kind thought:) Regards,

Mike Monett

Reply to
Mike Monett

iz7ath says the esr tester circuit came from an Italian magazine, Nuova Elettronica N212. It would be interesting to see their writeup, because its operation seems backwards to me. If no capacitor is connected, the bridge is balanced, and there's no signal to the meter, which reads 0. With a capacitor connected the bridge becomes unbalanced. A perfect capacitor, esr = 0 ohms, maximally unbalances the bridge, and presumably pushes the meter to full scale. A poor capacitor reads slightly less than full scale. For example, with esr = 1 ohm (which is not a very good capacitor by today's standards) we still get a nearly full-scale meter reading, because 1 ohm is so much less than 22 ohms, and is still pretty close to zero ohms by comparison. So the meter is hard to read, showing little change for various capacitor esr values in the sub-1-ohm region of interest. In fact, 1-ohm and 0.1 ohm capacitors would have nearly the same reading. Not good!

Reply to
Winfield

Looks like there will be lots of SR error too. It appears that the ideal transfer function at the output will be a peak of ~Vcc*(1-ESR/22) which is not too bad, it can be worked but he needs to change some things around...such as subtracting the voltage at the junction of R11/12.

Reply to
Fred Bloggs

The same meter was published by Marvin Smith in the July 2001 edition of Poptronics. A quick google search found many references to the Poptronics article, but no copy of it. I know it's the same meter since I have a PDF copy of the Poptronics article.

Mike

When truth is absent politics will fill the gap.

Reply to
Mike
[...] Clip Teranews comment that's now 2 days out of date.

Had another idea for the original circuit that needed another opamp, so used 2 of the spare gates in the CD4066 as an oscillator. Turned out nice. So if anyone needs a quick LC oscillator (below a couple of meg) a design is here.

begin 666 CD4066 100kHz LC Oscillator.png MB5!.1PT*&@H````-24A$4@``!=^O'+:,Y MN];Q4[H.DW2=`)I.^]O=:;^]=VBFV37'KYT*?]/Z1:>%X'1]32H=?2[FX?D. MMSL%O.GMEC?#W?>FN?CL#>L_-A:LDZZO2&^/-J2'YSONI_=NW1UH&>R8GP[3 MZ#I,TO6E-32W=KWW:W/7UF-+8U-T?6%+!S6([LEH?YT^#'-*O:[#!%U?V!T' M+@8)#.CQ^2[VU_N?Z"W9/PI_U_W$?=*@`EU?V#T=C)WU9^8[.V]:7.1G#8K3 M]87=U;+867_J]3!U_RX2^VF#PG1]87=VO=H]?;0TM!WOD@Q! P M%UU?2/JN[[KWTHTPTITCUWF( MP9\\W*$O7UZ3W+TP\\F,VZAOOK3?OK?2OH.CQ+U]=D^"\\'-;M >_#G?_-H!WPT MZ\\WQ.$Z1!QCE68)9Z/J:7'3]OG_ELZ*+0TKM>=/;CS!]7O&4]8=W^">6+[$( MK(6NKTG:AZPNY>#W,+4_&Y?'U*,_ABZ\\-/ MU#UO$/$I@VIT?6'W_\\NF^;I>_UQPQ*KC76\\B^KW`('H^L*R=?VF=]J=_2%$?,J@&EV?Q\\7K^+H3 MA:FZ?KBDZ[ L79]%]W;BO3KWO[+K?G]3 0AZXO[*Z? M2[KUO.3\\GGE_F!E$?,J@&EU?V.U=O^.\\Y/R>>7^8&41\\RJ :75_87 M5*/KB^F=,&WK?O7*8Q?CT'6(0]>7GZJ/.7.>KZ36[XYT'N^4== MRPG^O$%9NKXF*^_Z6=7GR[HMC6W1]359?]=WIX,P;>6=_9TM@875^3]7>]=\\*T=PZCNN#/&Y2EZ^-Z+\\(+]*]9A!CB"N=-(0)= M'Z?KC[CQO.GL68^\\I4%YNCY.UQ]QTWG3_OG3&68ZW.-Z7"GL]P+!*'KXW3]$3>_'J;WW%8?:G\\_ ML]P+!*'KXZ)V/,O>+.A=4 MH>N3*[;K!GGI^EZ"*G1]3:(_RK#S19T+JM#U-8G^*,/.%W4NJ$+7UR3ZHPP[7]2YH I=7TCS MR-N*S?@HV_GN^Z&LL'\\*4>>"*G1](0^]K=B

Reply to
john jardine

We'd love to see a copy of the article. Failing that, a posting of the relevant portion of the meter-reading interpretation and of the circuit-operation explanation would be helpful. Be sure to include the author's full names for credit.

Reply to
Winfield

SNIP

Over on ABSE, Mike posted what appears to be a bad English translation of some of the article:

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ The project came from an italian magazine (Nuova Elettronica N212);

It's very simple but interesting; I've built it and tested some capacitors, so I think it's very useful: build it; It measures the ESR (Equivalent Serie Resistance) of capacitor (electrolytic and not); pratically you can see if a capacitor is good or not.

It's a bridge circuit that work at 100Khz; there're the following possibilities:

1) The electrolytic capacitor is good: (low ESR) the bridge will stay balanced and the meter will indicate the maximun current. 2) The electrolytic capacitor is not good: (high ESR) the bridge will be unbalanced and that will cause the meter to indicate less current; as less the meter will indicate as higher will be the ESR; After few measure you'll be able to decide if a capacitor is good or not. 3) There is a short circuit in the electrolytic capacitor: the meter will indicate the maximum current and the red LED will lamp; capacitor is not good. 4) The electrolytic capacitor is broken: the meter will not move. Capacitor is not good.

formatting link

~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~

It's interesting how the author calls the case where a perfect capacitor is connected, "balanced".

Reply to
The Phantom

Ok, I posted the article on a.b.s.e along with a link to a totally different meter that was sold by Dick Smith electronics. I'd be interested to hear any comments on the Dick Smith version.

Mike

If there is no absolute truth then nothing can be known.

Reply to
Mike

The DSE meter was designed by Bob Parker, an aussie with a good head on his shoulders. The meter has been marketed as both a kit (best bang for the buck) and fully assembled and tested models. Most service techs that I know and those that have posted on the sci.electronics.repair NG swear by this meter. I bought and built a kit a number of years ago, and still use it. It's paid for itself many times over in the time that I've owned it.

I understand the Dick Smith has stopped selling the meter, but Bob has found other outlets for it. John's Jukes

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in Canada sells them (that's where I bought my copy).

I don't think you'll find a bad note from anyone about this meter.

--
Dave M
MasonDG44 at comcast dot net  (Just substitute the appropriate characters in the 
address)

"In theory, there isn\'t any difference between theory and practice.  In 
practice, there is."  - Yogi Berra
Reply to
DaveM

I'd love to have one of those meters. The design seems respectable, and the most sensitive range, 0.00 to 0.99 ohms, looks ideal for working with serious switching-supply capacitors. I see it uses a 50mA test current and amplifies the resulting esr signal by about 25x before presenting it to a comparator, the other side of which gets a slow 20V/ms ramp (9.5uA and 470nF), to measure the signal.

The difference between Bob Parker's design for Dick Smith Elec., and the Marvin Smith esr meter we were discussing is dramatic.

Reply to
Winfield

From Mike's abse post, with the DSE / Bob Parker link:

There is another meter kit that was available from Dick Smith Electronics. The manual can be found at

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Reply to
Winfield

See more about the Bob Parker meter here:

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Get the .pdf for the latest model here:

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Go have a look at a forum all about bad caps here:

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I've only just started looking around there, and there's a lot about ESR. For example:

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Reply to
The Phantom

9.5u/470n=20V/ms??? Something's not right there. And the ESR pulse amplifier DC bias schematic seems screwed with about 0.6V output offset.
Reply to
Fred Bloggs

buck)

Excuse me, I meant to write 20mV/ms. Yes I saw the schematic said 0.6 volts quiescent at the amplifier output, but I calculated about 2.8 volts (5*220/320 - 0.65), so that's a puzzle. Moreover, it's a non-inverting amplifier, and with low duty-cycle 50mA pulses (for low battery consumption), we'd expect positive-going output signal pulses from the amplifier. Something indeed looks wrong there.

Reply to
Winfield

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