>I need to convert a _slow_ moving analog signal to "1" or "0",
>depending on whether it is above or below the digital threshold
>(CMOS).
>
>Problem: If I go directly into a gate or D-input of a flop I can get
>substantial overlap current rail-to-rail.
>
>This is a very low current application.
>
>Any suggestions?
>
> ...Jim Thompson
What's the technology... discrete or inside an IC?
How low is "low current"
Speed/hysteresis requirements?
What's the input signal level?
John
Inside an IC, I'm designing it.
1uA
I have ~10us to make a decision, no hysteresis (yet).
0V-to-3.3V CMOS levels, out of a _very_ slow comparator....Jim Thompson
How about a couple of common-base (or common-gate) stages. Input goes to emitters; PNP base is maybe 1 volt below Vcc; NPN base is +1 from ground, both base drives weak if it's bipolars, anything for fets. Collectors/drains connected together are the output.
John
So its output is "0", "1", or FLOAT ?:-)
...Jim Thompson
It floats between input peaks. If that could be forever, add a bazillion ohm hysteresis feedback resistor from a later stage.
John
If it's a comparator, then it's nominal outputs are '0' and '1'. In your case its outputs are '0', '1' and 'confused'.
So why not just use a regular old Schmidt trigger? It'll catch the '0' and '1' cases correctly, and won't do any worse with the 'confused' cases than anything else you could cook up, unless your circuit knows more about what's going on from somewhere else.
I'd be tempted to use the power of the input signal, so common gate input structure is used to achieve simple voltage gain.
The output may look indeterminant, but it's not, it's just slow.
RL
Assuming this is a repetetive action, put a sample-and-hold in front of a Schmitt and trigger it off the back edge of the D-type clock. Of course that won't work if it's a random event.
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