SRAM scaling isn't dead after all — TSMC's 2nm process tech claims major improvements
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If my arithmetic is right, there are about 50 atoms of silicon per cubic nanometre. Surely we're approaching the limits of this.
Sylvia.
The cell structure would be interesting. Six transistors?
I'd love it if our uPs had a lot more SRAM.
The stated '2nm process' has little to do with the actual size of features on the chip. It has become a sales argument rather than the true size of something.
Jeroen Belleman
It’s the 21st century, man. What matters is that the _names_ follow Moore’s Law. Excelsior!
Cheers
Phil Hobbs
Some day we'll hit the limit. That won't be a disaster.
But two is still better than 50. Probably.
If I recall, it actually has a fairly precise definition, that it's the smallest feature size that can be manufactured. So, it's roughly equivalent to a pixel, and it takes many pixels to make a legible letter or number.
Joe Gwinn
It used to, to be sure, but no more. You can't image 2nm details with 13nm EUV.
Jeroen Belleman
You can, actually, because of the high contrast of photoresist. You do have to use multiple patterning steps per level.
Cheers
Phil Hobbs
I've heard that the EUV mask sets can cost a billion dollars.
Don't know; wouldn't be surprised though.
Joe
To some extent, yes, OK.
Talking of photoresists, these are usually polymers, that is, large molecules. At some point, that will also set a limit on the minimum size of features.
Jeroen Belleman
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