The board which we are currently designing, has a CPU with programmable drive strength for for its memory controller. For example, max IOH and IOL can be set in software for source/sink current of 4ma, 8ma, 10ma or 12ma. If I am correct, output/source impedance of the memory controller also changes when we change the drive strength and it comes to approx 40ohm, 50ohm, 62ohm and 120ohm for 12ma, 10ma, 8ma and 4ma drive strengths respectively. Since source/ output impedance is one of the parameter for calcuating the trace impedance for impedance matching the traces between CPU memory controler and DDR memory device what value should I consider for calculating the trace impedance for maintaining signal integrity? At this point of time I do not know the drive strength that will be set programatically by the user. Any help is greatly appreciated
Thanks MJK