Power filter designing

Hi every body I=92m working on a board that has lots of signals in 600 Mbps and a bit signal in 10Mbps. (in fact there is some SERDES that de-multiplex

10Mbps signal to some 600 Mbps signals). Currently my design have three ceramic capacitances for each power pin of SERDES witch their size is 100pf, 10nf and 100nf and some tantalum capacitance that share all pins. But still there is some noise in the power. I thing I need some advise on designing the power part. Maybe my design needs some Pi filters or something like that. Thanks and have a nice day! Javad.
Reply to
Javad Benhangi
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At the frequencies is question, the layout of the capacitors is more important that the values of the capacitors. You want to point one east and one west and make the traces to them as short as you can.

Placing the bypasses as surface mount parts on the back of the PCB directly under the IC also helps.

On the PCB, you generally don't want to put any impedances in series with the power except for right at the power entry an where the power goes over to the analog part of a board.

The impedance at the power entry should be something lossy. For low current cases, just an RF bead works. This keeps RF from leaving via that route.

The impedance on the way to the analog part should be just enough to keep the AC currents off the power net. Any more and the loads within the analog part start to matter a lot.

Reply to
MooseFET

Does your board have ground and power planes? What's the stackup?

The copper plane/pour geometry matters a lot. If that's right, you can just splatter a few large ceramic caps here and there.

The idea of mixing cap values is usually silly, as is the idea of using caps per pin. Just use some biggish 0603 ceramics on a power pour or plane. I like 0.33 uF.

Tantalums, or better yet polymer aluminum caps, are good if you expect large low-frequency steps on the device Vcc current, like a processor that sleeps between tasks. Most data streaming and FPGA applications don't do that.

How do you know there is noise on the power? How are you observing it?

John

Reply to
John Larkin

Good question and very important on measuring noise. You may be seeing something that really isn't there.

Reply to
mook johnson

Porcelain microwave capacitors did seem to do better at those kinds of frequencies - the dielectric seemed to be less lossy than regular ceramic dielectrics. Finding a broad-line distributor that stocks them used to be a pain, and it is years since I've looked.

Around 1990 we could find 1nF in a tolerably compact surface mount package (not that you'd expect a leaded package with a microwave device).

-- Bill Sloman, Nijmegen

Reply to
Bill Sloman

I've TDR tested "wideband" and "RF" caps (like the Dilabs and ATC parts) and, for low-power coupling or bypassing applications, there's no visible advantage over 2-cent ceramic surface-mount parts. ESL goes pretty much with body size. And if you're bypassing power planes, placement doesn't much matter and there's no reason to mix values. Low-loss caps, like porcelain, are good for high-Q requirements, or high RF currents.

On a multilayer board with ground and power planes, it's hard to do the bypassing wrong.

John

Reply to
John Larkin

It's tricky to measure power plane noise. Sometimes I include an SMA footprint i=on a layout so I can TDR the bare board and, after it's built and working, pipe the plane noise directly to a fast scope.

Lacking that, solder a piece of coax to the ground and power pins on the board, with short leads, and run that to a scope, through a ferrite maybe. Probes don't work very well here.

John

Reply to
John Larkin

I was referring to the porcelain dielectric capacitors which I'd never seen labelled as anything except "microwave". Dilabs does do them

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ATC now labels them as RF capacitors. The smaller ones do seem to have quite respectably high self-resonant frequencies.

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-- Bill Sloman, Nijmegen

Reply to
Bill Sloman

Thank you everybody. I have one more question. In my case the board is eight layer (Top Signal | Power Plane | Gnd | Mid1 Signal | Gnd | Mid 2 signal | Gnd | Bottom Signal). I have some problems with the PCB board. There are five BGA chips on it that according to their montage profile the temperature should reach up to 260 degrees centigrade but the board color and its shape changes as the temperature reaches 220. When I send the problem to the PCB manufacture they said that ere made as regular FR4 material and tin-lead finish and it shouldn=92t use in using RoHS temperature profile. I think they should let me know about possible board montage problem and ask me about this option before start manufacturing it because I said them that this is the first experience of mine. Anyway, I=92m going to reorder the board but I really don=92t know what possible options for the board manufacturing are. What I know is just that A) the board should stand temperature over 260. B) The board should stand multiple montages and de-montage process As the frequency if high, what kind of FR4 board is the best? What is the PCB board electrical test report like? They said to me that they have electrically tested the board but the board had some manufacturing fault? Many thanks

Reply to
Javad Benhangi

On a two layer board (most of my designs) I like to use a 0603 or 0402

100nf capacitor per power pin for QFN and QFP packages. The ground plane on such PCBs is usually solid.
--
Failure does not prove something is impossible, failure simply
indicates you are not using the right tools...
nico@nctdevpuntnl (punt=.)
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Reply to
Nico Coesel

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