I don't think so. The output leakage for that part is thousands of times higher than the current you want to produce. Maybe that DAC and a
10,000:1 reducing current mirror. Also problematic in that current = range.?-)
I don't think so. The output leakage for that part is thousands of times higher than the current you want to produce. Maybe that DAC and a
10,000:1 reducing current mirror. Also problematic in that current = range.?-)
I built a little curve tracer gizmo with pots for V_GS (min and max) and V_DS, with banana jacks for the DUT and four BNCs for the measurement outputs. I find that there's a point at around 1.5V V_DS and -0.4V V_GS where the gate current goes to zero. (Drain current is around 20 mA, which makes the dissipation reasonable.)
That's pretty counterintuitive--either the pHEMT is still oscillating despite my best efforts, or there's some weird solid state effect that looks like an electronic venturi. (Of course something like that happens in BJTs too, so I shouldn't be that surprised.) Since it goes through 0 and keeps on going, the null seems to be from the cancellation of two independent leakage sources. Their shot noise contributions should add in power even if the DC cancels, so zero gate leakage probably doesn't mean zero gate shot noise, more's the pity. Still, the leakage is in the low single-digit nanoamps, so it may be pretty quiet.
The next job is to try building a simple low frequency version with a decent amount of gain, and see what its noise is like. This really is a fun project.
Cheers
Phil Hobbs
That is really cool. I expected the gate to bias itself a bit positive. The voltage inversion physics must be wild.
I'll try a couple here if I can get a break in the insanity.
The famous Bob Pease effect was a zenered transistor b-e junction that created the *opposite* polarity voltage in the b-c junction. Bob attributed it to photon generation in the zenered junction and PV effect in the other.
Yup, capacitively couple the signal right into the open gate. That should invoke comments.
John
I just finished writing up some results from a nice working prototype. With a 50-ohm termination on the input, its noise at 50 MHz is 1.1 nV/sqrt(Hz). With an _open_circuited_ input, it's 0.45 nV, which is close but so far no cigar. Input leakage at operating bias is only a nanoamp or so, despite the thunderings in the datasheet about 1 uA max leakage.
Prototyping on Cu-clad FR4 with SC70s is not for the faint of heart--see
The 1/f corner is about 10 MHz, which as it turns out I don't care about, but it does make these little guys harder to use as TIAs. (They may make some kick-ass bootstraps, though.)
Anecdotally, some pHEMTs have noise down in the 0.25 nV range, so I'll try another couple and see.
Fun.
Happy Thanksgiving, all.
Cheers
Phil Hobbs
Consider maybe getting a few sheets of the Bellin snap-apart surface-mount adapters. Or, since your time is worth something, laying out a PC board and getting some quick from AP Circuits or like that.
As RF amps, they get noise figures down below 0.3 dB. But there's something magical about tuned circuits.
Electronics is!
You too. Pecan pie is about as good as life gets, in public.
John
I started with the Bellin things, but couldn't get it to stop oscillating in the 8-12 GHz range.
You can adjust the source impedance to be anything you like, which helps. I still have some work to do to optimize this one with respect to V_GS and V_DS. A noise figure meter would come in really handy about this point, but I haven't got one.
Cheers
Phil Hobbs
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