PCB size reduction using blind/burried vias?

Klaus, It would appear that you are looking at your costs in an unrealistic manner. The savings of 10% space is not equal to 10% cost. For multilayer boards, particularly multi-layer with blind or buried vias, your material cost savings are probably closer to 1-2% cost for 10% size reduction. (Unless that small size reduction allows the addition of further multiples within a fabrication panel. Then you might save significantly. It all depends on the size of your boards and how they fit into the fabricators fab panels.)

Materials are typically cheap, the processing costs.

As for your question, there is no simple answer. It would take a lot of details of the design to even start taking educated guesses. Like, number of nets, components, component pitches, trace sizes and spacings, via sizes, board size (as is), etc., etc.. Even at that it would be a guesstimate, only you can know the existing circuit and how much you might expect to save in board real estate.

My very very rough guesstimate, you wouldn't realize a significant size reduction, assuming your design is now quite tightly packed and is forcing this blind/buried consideration. How much addition routing space are you going to realize on any one layer by the removal of a few vias, here and there? If you only need a bit more room in some tight areas like around BGAs (or other very tightly pitched components) , then you might have things work out better with blind/buried vias.

But remember, on a 4 layer board you can't get both regular blind and buried vias in the same design unless your fabricator is doing laser drilled blind vias. I suspect they are not if they are only talking such a small delta in pricing.

Another couple of things to consider is the convience provided by normal vias when debugging and any concerns about reliability as blind and buried vias are a lot harder to manufacture.

If you have the space, there's no need for blind/burried vias. Are you using 4 total layers, or 4 routing layers plus 2 power layers? If you are using 4 total layers, it would suggest that your part density is low and/or routing is simple which probably means you don't need blind/burried vias. Where I have used blind/burried vias, I had space and component position constraints and high density placement of parts which led to using blind vias. If you are hand routing a board, it makes the layout job harder. If you need space and aren't using 0402 capacitors and resistors, I suggest using smaller components before going to blind/burried vias.

If you plan to use blind/burried vias, talk with your board manufacturer about layer grouping rules before you commit to routing the board. Better yet, send them a sketch showing the cross section of the board and your proposed via layer grouping. They will give you feedback about your layout that could save you time/money.

Use the simplest technology that will get the job done.

Hi Klaus,

I've been a professional PCB designer for over 20 years, and have heard this question a few times before, and looked into it.

First, the amount of space to be saved is usually very small, perhaps only 1-2 per cent. There is almost no case where the feasability of the layout depends on such a small savings.

Since the cost of blind/burried vias can be quite a bit greater (of course it's coming down as the years go by...) and also there are the reliability and inspectability issues, I say avoid that technology if at all possible.

I have found that the main things which keep layouts small are good component placement and minimizing the number of vias. Increasing the number of layers excessively, or using blind/burried vias isn't really going to help much.

If you have a layout that you can't seem to complete, you might want to hire another designer to consult with you on it. I use very accurate mathmatical modeling to determine layout feasability, and define the number of layers, vias, etc. It might only take me a few hours to perform that analysis, and then you could either use it as proof that the layout is impossible, or see what you would have to do to make it work.

Best wishes,

Jean Lestrale

If we're talking about inner vcc/gnd layers, then buried makes little sense (short?) and blind is only going to help you on power/gnd vias. One advantage of that might be freeing space behind a BGA to put in caps. Other than that, it seems like a waste for 4 layers!

Well, one of the reasons I am going to look into this technology, is that it is possible to have a via under/below a SMD part (its pads), where one would normally find the a space to place the via in the gaps between parts. But, I am not an expert on layout, so I take your comments for good input

Thanks

Klaus

snipped-for-privacy@dakotacom.net skrev:

Thanks for the comments. I will contact a third party designer to evaluate the blind via stuff (we have no experience in-house)

Regards

Klaus

But you have a 4 layer board, so that via can only go from the back side to the next-to-back side which is probably a ground/pwr plane. Sure, that helps, but not much.

There are other ways to make via-in-pad work, depending on your pcb manufacturer. It is possible to get varnish-filled vias, though it is far from convenient for testing. It is also possible to get the pcb manufacturer to provide solid solder deposit, which should fill up the vias (as well as saving you from using solder paste). I haven't tried SSD, I've only read about it.

Hal Murray skrev:

Actually the technology uses laser vias. So vias can go from on a

1-4

Regards

Klaus