Passive frequency divider

I think it's (barely) posible with a varicap.

I posted a circut here once but someone disputed that it actually works. But it had inductors too. That wasn't resolved.

Some diac circuit should work, but three stages would be tough. One might divide by 8 in one step, I guess. Like old neon bulb or thyratron dividers. Envision trimpots.

Why not rectify the signal to power a CMOS divider? One trick is to use the ESD diodes of the chip as the rectifier to make a magical apparently-unpowered logic circuit.

I'm designing a tachometer now too. We just released the PCB design and ordered boards.

John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics

Are you just trying to avoid the need for a separate power supply? If so, the simplest solution might be to rectify the incoming signal and then to use this supply to power a 4000 series CMOS divider which will draw negligible current. Capacitor couple the input signal and let the protection diodes of the divider chip rectify it for you. Just have a decoupling capacitor across the power rails of the divider chip and maybe a 12V zener to protect against excessive voltage. You might need a device with input hysteresis to avoid multiple triggers on slowly rising signals.

John

Are a few discrete transistors OK? What I've done to divide by a small integer is to charge a film capacitor with a constant amount of charge per input pulse, plus a comparitor that dumps the charge when the foltage indicating that N-1 pulses have been exceeded.

Joe

Really? I suspect that you are suffering from a misapprehension.

The first question is, "what do your mean by a 10V AC signal"?

If you mean 10V rms, it is a roughly a +/-14.1V peak to peal sine wave.

The next is, what make you think you can make a passive frequency divider with diodes, resistors and capacitors?

You can make a frequency doubler - a full bridge rectifier could pull out a raised half sine wave with about half the amplitude at 200Hz, and you could double that again to 400 Hz. Schemes that pull out a narrow pulse once per cycle create a waveform that has all the odd harmonics up to a limit set by the width of the pulse, and you can filter out the higher harmonic you want.

Frequency dividers depend on counting zero crossings and sending out a signal when you have counted enough. Sending out a pulse on every eighth transition would give you a 12.5Hz clock. 8x8=64 and 4x9=36, so counting two batches of 8 edges then one batch of nine would give you a jittery approximation to a 12Hz clock - dead accurate in the long term, but visibly jittery.

That wouldn't be an kind of passive scheme.

There are better ways of doing that - you could use a phase locked loop to set up a high frequency oscillator that was locked to some multiple of your 100Hz reference - say 300Hz - and divide that by 25 to get the

The usual question at the point is "what are you actually trying to do". It usually turns out that there is a well-established solution to the problem that you actually need to solve, and that most of the people who post here have known about it for decades.

It wouldn't be the first time 8-) .... Ahh, I see your point. I was misguided...... Counting down requires discarding pulses, which implies something akin to memory of which pulse to discard. That takes latches, which need power.

If anybody cares, the motive was to use a 14 pulse per revolution signal to drive a tachometer (speedometer, actually) that wants about 1 pulse per revolution input.

Thanks to all who replied, and apologies for the noise. For some reason I thought that if diodes could double frequency, the right topology could halve it too....

bob prohaska

Not passive, but using a CD4060's /16 output would be a simple solution, assuming you can extract enough power from the incoming signal to provide it's supply.

I've been hearing that 4000 series logic is obsolete for the last 40 years, but for some use cases it still has it's place.

Sloman has declared that you are ignorant. Apologize, repent, say 14 Hail Marys, and sin no more.

A barefoot pilgrimage to New Jersey wouldn't hurt either.

You can make parametric frequency dividers in a couple of ways that I know of.

Varactors can do it, especially if you forward-bias them on the positive peaks. You’d need a honking big one for 100 Hz.

Alternatively it can be done with nonlinear magnetics. The 20 Hz telephone ring signal was originally generated by a divide-by-3 mag amp circuit running from 60 Hz mains.

I second the flea power CMOS suggestion.

Cheers

Phil Hobbs

There was a telephone ringer circuit that did something like that using a saturable inductor and a resonant circuit. The circuit is probably in "Telephony" by Atkinson, or some similar GPO telephone training manual.

Everybody is ignorant. There's no need to apologise for it. Being persistently and incorrigibly ignorant (as John Larkin is in a number of areas) can get irritating, but getting incorrigibly ignorant people to learn what they ought to takes more than getting them to repeat irrelevant strings of text.

Why New Jersey? And why barefoot? US Army ECOM used to be there, and I got sent there for couple of days in 1970, but the only education I got from the visit was that the US Congress was going to cancel the four nation collaborative project, because they didn't like the idea of US defense money being spent UK, Canadian and Australian products. My shoes stayed on throughout.

John Larkin has a some very impractical ideas. He even seems to turn some of them into products that he claims to be able to sell.

It's a standard joke in the USA 8-)

For emphasis ;-) Sorry you didn't get it!

bob prohaska

Spend a week in Newark or Freehold and you'll understand.

It's a good one. We had a thread - many years ago - about a 5V 100kHz low power oscillator that drew less than 10uA. It's a pretty silly idea. We ended up with two solutions, one using an LC oscillator which stored most of the charge needed to get the switching transistor from on to off and the other which just used two 5GHz transistors because their collector-emitter capacitance is really low - about 0.2pF. Both came out at about 3uA.

CMOS transistors tend to come in at about 10pF drain to source,and you'd need four of the them to divide down from 14 Hz to 1 Hz.

That's about 1 ampere.hour per year or a Lithium iron phosphate 9V PP3 cell (typically 1200mA.hour). They last for about ten years in storage.

If you built your own logic with discrete transistor chosen for low collector/emitter or drain/source capacitance, and ran it at a low voltage you could do better.

I like that! You could use a single UJT (Unijunction transistor) where your pulses charge the C and it will generate an output pulse if the C voltage gets high enough :-)

I still use UJTs in some projects, ebay has those..

Yep, that actually was how some frequency dividers worked 60-70 years ago!

That was the thread "Magamp oscillator" in November 2015.

I *did* give in eventually, but the circuit was tuned. It divided something around 97MHz by two. It didn't divide just any frequency.

Here's an ASCII version of the schematic that sort-of worked:

tank +-----------+ | | | | V MV2201 L = varicap L | L 1u | | - | / \ | | V | GND \ / | V=1+sine(97MHz) (pump) | GND

Jeroen Belleman

Dividing not 1Hz but 14Hz. That was a really embarassing typo - and should have been an obvious one.

You can certainly create a product that does not require any external power to do this job. But far more information is needed than you're giving.

Is the tach output differential floating or referenced to chassis ground? You've already told us it's a 10V amplitude. Is that unipolar?

What does the speedometer require in terms of signal amplitude and pulse width? Many require a minimum pulse width of several milliseconds, and few to many volts of amplitude for noise immunity. Back in the day, signal amplitude was the main fallback to achieving noise margin.

What range of RPM are you dealing with? 0-RPM?

With that out of the way, you need to concoct a /static/ logic circuit to process and transform all the signaling. And that means no timing components. As for internal power, a coin cell form factor with an exceptional shelf-life will make the circuit, in effect, a forever thing.

Something like this, with a 20-year shelf life.:

You can use 2x CD4018B's for the logic, and /maybe/ a dual N-channel MOSFET for an analog pass-through switch; it depends on info you haven't provided. Both of those have very low equivalent power dissipation capacitance, 63pF for CD4018B due to the Johnson counter topology, 150pF for FET input capacitance. As in this, which even DigiKey sells on the cheap:

May need or may not need a protective TVS and some transient filter caps. You do need some decoupling for the logic, which is minor. And you need some creativity in your circuit design, especially with the choice of COM for the battery; it depends on info you haven't provided.