Painless micro program

MOV DPTR,#B ; 1 MOVX A,@DPTR ; 2 MOV R5,A ; 3 MOV DPTR,#C ; 4 MOVX A,@DPTR ; 5 ADD A,R5 ; 6 MOV DPTR,#A ; 7 MOVX @DPTR,A ; 8

The 8051 took 8. Now lets see if I can remember the 1802 well enough:

LD #LOW(B) ; 1 Data = low 8 of address PLO R5 ; 2 Put to low 8 LD #HIGH(B) ; 3 Data = high 8 of address PHI R5 ; 4 Put to high 8 LD #LOW(C) ; 5 PLO R6 ; 6 LD #HIGH(C) ; 7 PHI R6 ; 8 LD #LOW(A) ; 9 PLO R7 ; 10 LD #HIGH(A) ; 11 PHI R7 ; 12 LDN R5 ; 13 Load what R5 points to SEX R6 ; 14 Do math with what R6 points to ADD ; 15 Do the math STD R7 ; 16 Store where R7 points

The instruction count for the 1802 is double that of the 8051 and with the slower clock speed, the 1802 takes about a billion times longer to do the same operation.

[... about keyboards ...]

I wonder if they've gone so far as to look at the code to see which instructions actually got used an only implemented that much of the

8048.
Reply to
MooseFET
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Impressive! For a 6800-family gadget, it would be

LDAA A ADDA B STAA C

And on the 6803, using "LDAD..." (load double etc) would do it for word operands, using the A and B accumulators as a 16-bit register.

On a PDP-11, it would have been...

MOV.B A, C or just MOV for word data ADD.B B, C

and the MSP430 is essentially the same, executing the sequence in about 400 ns. Both machines allow a choice of relative (relocatable) or absolute addressing. The rumor is that a few guys invented the PDP-11 architecture one night in Gordon Bell's basement.

On a 68K, it would be three ops, loadreg/add/store, but you'd have your choice of byte, word, or long.

There weren't many triple-operand machines around, ever.

John

Reply to
John Larkin

Several of my customers program my (sometimes hairy) VME modules in ladder logic, and seem to do at least as well as "real" programmers. Their "code" seems to be fairly portable, too. And I think, from what I know, ladder logic is uncrashable.

John

Reply to
John Larkin

I actually have worked with a machine that used up to 7 operands for a single instruction. IIRC the instruction was a repeated move selective replace using different source and destination indexes, different base address (with a special interpretation for one), a mask value, replace value, and iteration count.

--
 JosephKK
 Gegen dummheit kampfen die Gotter Selbst, vergebens.  
  --Schiller
Reply to
joseph2k

Yikes!

Some of the CISC-ier machines, like HP 3000 and Vax and the nearly forgotten, failed 32-bit Intel chip (what was that called?) had outrageous instructions, like polynomial eval and hairy string ops, but that was just tons of microcode so doesn't really count, by my official decree. The 68332 even has a few, like the linear interpolation thing and hi/lo limit checks.

John

Reply to
John Larkin

The 432 or its successor the i960?

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Robert

Reply to
Robert

I was thinking of the 432, too elegant and too slow. The HP3000 was a similar stack-operating machine with a lot of high-level constructs, and started out almost fatally slow, although they eventually got it up to speed and sold a lot into banking and such.

I wonder if Itanic will survive?

Strange that we wound up with the kluge that is x86.

John

Reply to
John Larkin

On May 20, 9:06 pm, John Larkin

[....]

The 432 was a classic case of a plan based on a fatal flaw. The 432 required two memory operations for a memory access. It had to look up in the table what the value could be used for etc and then get the actual value. This slowed it down a lot.

It was an attempt to make a processor that was "safe". In theory, your program couldn't go too far astray before the hardware caught an illegal operation.

They missed the performance mark and kept many bright people at Intel too busy to work on a processor that would meet what the market needed in the short term.

[....]

It was, I think, those who weren't good enough to be let onto the 432 team that designed the 8086. It would have been better if they had just taken the 8080 design and doubled most of the registers etc.

Reply to
MooseFET

Dunno. They fixed it on the 6803.

In its defense, on an external interrupt or an SWI trap, the 6800/6802 pushed all the registers (including the index) and the pc and the ps, all automatically, which is sort of a hardware context save. That made the RTOS situation sort of neat: on entry to the scheduler, from a hard or soft interrupt, all you had to do was save the task stack pointer in the job header, and then you could reschedule and run the hottest task, or just RTI back into the previous one.

John

Reply to
John Larkin

Reminds me of the poor old Zilog Z8000.

--
 JosephKK
 Gegen dummheit kampfen die Gotter Selbst, vergebens.  
  --Schiller
Reply to
joseph2k

Maybe i don't remember right but i think that the NS32000 was a two operand / three operand machine.

--
 JosephKK
 Gegen dummheit kampfen die Gotter Selbst, vergebens.  
  --Schiller
Reply to
joseph2k

The Intel 196 family had three operand opcodes.

donald

Reply to
Donald

Three operand opcode machines are fairly common. Any CPU with a fused multiply-add or dest-src-src instructions will have three opcodes.

--
  Keith
Reply to
krw

And many of them required one source and the destination to be the same or even gave no choice for that source and destination. Thus they did not program like a three operand machine. I was speaking of generalized three operand instruction set architectures.

--
 JosephKK
 Gegen dummheit kampfen die Gotter Selbst, vergebens.  
  --Schiller
Reply to
joseph2k

So am I. That's why I said dest-src-src rather than dest-src. Obviously not all instructions are three operand.

--
  Keith
Reply to
krw

I once read a real old book "introduction to computer programming" it described some sort of prime machine and a language "primus".

It was a base 10 machine addresses were 10 digits wide and it had 1000 of them, the first digit was the op-code, the other 9 were the three operands, I don't recall a stack.

Bye. Jasen

Reply to
Jasen

Are you talking about "Prime Computer" and "Primos"?

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We had one of these beasts at Microdyne for MRP and accounting.

--
Service to my country? Been there, Done that, and I\'ve got my DD214 to
prove it.
Member of DAV #85.

Michael A. Terrell
Central Florida
Reply to
Michael A. Terrell

"Primos"?

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had one of these beasts

I kind of liked the idea of "pure functions" they had. I am sort of surprised that the x86 line didn't end up with a method of enforcing routines to only read from the passed parameters and produce a result. It would allow optimizers to do a better job. You wouldn't have to switch off the short circuiting of boolean evaluation when a function call was in the statement.

Reply to
MooseFET

I'm fairly sure it was "Primus", because I recall thinking "The silly buggsers have named it after a camp stove!" It wasn't until later that I discovered Prime had been a computer maker. It's possible that the book describes a fictional computer modeled on the one you describe.

I can see how a base-10 computer could suited to accounting.

Bye. Jasen

Reply to
Jasen

"Primos"?

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had one of these beasts

We had a full time programmer on staff to tweak the software, and the system was off limits to everyone else. He did add a few reports and functions to the MRP when I asked, and would download reports to floppies for me, since it was only allowed from the console terminal. there was 128 serial ports for the Wyse and other terminals scattered all over the front office, engineering and production areas.

--
Service to my country? Been there, Done that, and I\'ve got my DD214 to
prove it.
Member of DAV #85.

Michael A. Terrell
Central Florida
Reply to
Michael A. Terrell

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