OT: PhD in Electronic Engineering

Your view of the world is limited by the limited jobs you've held. I've seen a *lot* of engineers who have never had need of a soldering iron. More so today than ever (far fewer technicians are required today, for much the same reasons).

Reply to
krw
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And maybe i have had to work with too many degreed idiots (including MS and PhD.) Another maybe is my standards are a bit higher. I know that you know that simulation is wonderful except when it tells you lies. On the same token, large FPGAs are not tractable without serious VHDL/Verilog tools and likely noticeable packaged IP.

Reply to
JosephKK

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Maybe you have only worked with idiots. Wonder why?

BTW, you're full of shit on all counts.

Reply to
krw
[snip]

Which is why simulations are only as good as the experience level. Many times I had to tell my team at GenRad... "Think! Is that physical?" Unfortunately I often got blank looks :-( ...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
      The only thing bipartisan in this country is hypocrisy
Reply to
Jim Thompson

When I was doing circuit sim at IBM ('70s) our models were excellent. I was using the highest speed logic masterslices as fully customs and the models agreed with reality extremely well, even though the models weren't being used as they were intended (even AC analysis, which wasn't done). Much later, the models weren't so good; best case, 2GHz on a 3GHz chip. Oops. :-(

Again, there were at least a hundred engineers for every one that held a soldering iron as part of their job. Unlike JKK, not everyone I've ever worked with was an idiot. Very few, in fact.

Reply to
krw

Like an idiot currently on the Antique radio group who claims to be an 'Analog Guru'. His only on this group were some time back where he ranted about 'BDS' and told people to use tin cans for project boxes. He claims to be an EE working for HP in one group, then admits to dropping out of college in another. I would swear that it was Sloman, but he is posting from California.

--
Anyone wanting to run for any political office in the US should have to
have a DD214, and a honorable discharge.
Reply to
Michael A. Terrell

Used to be that simulations were inaccurate due to deficiencies in the software. Back in the late '70's I had GenRad's Fortran version of

2G6 (I think) re-written for proper rendition of B-E capacitance at forward bias. Made a HUGE difference if high frequency characterization.

CMOS foundry models are now VERY accurate, but MANY behavioral models for OpAmps and switchers are crap :-( ...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
      The only thing bipartisan in this country is hypocrisy
Reply to
Jim Thompson

IOW, They don't get what they won't pay for?

--
Anyone wanting to run for any political office in the US should have to
have a DD214, and a honorable discharge.
Reply to
Michael A. Terrell

Really nice: A driver chip (meaning power ...) that I checked out yesterday had a model with a text in front of it that said it's for small signal analysis but not useful for distortion, harmonics, intermod and such.

What good does that do?

--
Regards, Joerg

http://www.analogconsultants.com/

"gmail" domain blocked because of excessive spam.
Use another domain or send PM.
Reply to
Joerg

Not much :-)

How can a model be for a "power" device and then say small signal, and "not useful for distortion"?

I'd guess it's a linearized model from rail-to-rail, and will report "perfect" small signal performance :-(

A few years ago I did some minor IBIS modeling. Two months ago I got a project to do a significant chip... so I had to catch up with 3 significant upgrades in the software. Now there's non-linear modeling for you!

There, of course, is one significant snag with accurate models... they tend to be significantly slower in simulation. ...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
      The only thing bipartisan in this country is hypocrisy
Reply to
Jim Thompson

Beats me.

That's why sims would be a waste of time on that one, have to test it the old-fashioned way on the bench. It isn't a rail-to-rail behavioral model but still, if the devices used don't hold their water with large signals then it's useless.

Yup. It raised my office temperature by 3F yesterday. That's nice in the winter but not right now. This wasn't different in the old days except that it was done by Tektronix boat anchors with tons of tubes in there.

--
Regards, Joerg

http://www.analogconsultants.com/

"gmail" domain blocked because of excessive spam.
Use another domain or send PM.
Reply to
Joerg

"Jim Thompson" wrote in message news: snipped-for-privacy@4ax.com...

Those of us doing RF work often cheat and use harmonic balance simulators... ;-)

Surprising that HB isn't found in that many mainstream SPICEs...

---Joel

Reply to
Joel Koltner

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Only have that problem with my current employer, my previous employer for

13 years had plenty of decent to bright people and damn few duds. Previous employer had no union for engineers, current one does; does that help you understand? And you are not a credible judge of people that you do not work with.
Reply to
JosephKK

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So a question for you, since SPICE is fundamentally time domain, and it sounds like harmonic balance may be fundamentally frequency domain; how would you set up the math to merge the two?

Reply to
JosephKK

The idea is that you restrict the input stimulus to be a sinusoid or a sum of various sinusoids that are harmonically related (...this gets you [approximations of] square waves, sawtooths, etc. -- most of the waveforms you'd use in regular time-domain SPICE anyway), and the simulation knows that with each sinusoid, even a non-linear network can only produce -- in the steady-state response -- harmonic "ratios" between the various inputs at unknown amplitudes and phases. (E.g., for sin(w1*t) and sin(w2*t) in, the output is a summation of sin(m*w1*t+n*w2*t) terms -- and while m and n span from -infinity to infinity, as a practical matter you know that their amplitudes will generally fall off quickly as m and n increase, although you usually have to tell the simulator, how high you'd like to take m and n to.) Hence you can write up a set of equations where the unknowns are the amplitudes and phases for the "harmonic ratios" output along with the DC operating point (m=n=0) and solve.

I'm not familiar with the exact form of the equations you get, but it has something to do with making use of the fact that the steady-state response repeats pediodically and this lets you use the "shooting method" differential equation solvers to obtain the "initial value" (the unknown amplitudes and phases) of the system.

The actual implementation apparently isn't too hard -- I took a class in college on SPICE simulators, and while everyone wrote their own SPICE to perform the basic DC, AC, and transient analyses, for a final project you were supposed to add on "something" and harmonic balance was not an unpopular choice. (I did some hokey component modeling using rational polynomials to curve-fit data in the hopes of reducing simulation time relative to using the full data set directly.)

---Joel

Reply to
Joel Koltner

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I understand that part well enough. That's not the issue, though.

*I* am not the one judging them. I am commenting on *your* judgment.
Reply to
krw

MS

that

for

that

I have invited you and many others here to come meet them. Discuss electrical engineering with them, and judge for your self. That invitation is still open.

Reply to
JosephKK

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Reply to
JosephKK

Again, I'm not commenting on *them*. They have nothing to do with (this branch of the) thread.

Reply to
krw

(including MS

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lies.

for

that

To the extent the question is of my judgment of them, then those whom I am judging become part of the issue. See them for yourself BEFORE condemning my judgment.

Reply to
JosephKK

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