I'm working on a design where a Cortex M3 writes data to an SPI Flash memory. The issue is that I have a data acquisition device that also needs to read the SPI Flash. Both devices can only be SPI masters. The UART on the Cortex M3 is being used for something else and I2C is too slow. Essentially we're trying to make the SPI Flash into a dual-port SPI Flash with external logic.
In searching for a solution I've seen that a lot of people have had a similar issue with SPI, needing multiple masters to be able to read from slave devices, which is not something SPI was designed for.
I'm trying to figure a way to use the I2C bus from the Cortex M3 to control some sort of multiplexer that can disconnect the Cortex M3 from the SPI bus and allow the data acquisition device to take over the bus. We have no GPIO pins available on the Cortex M3 to use for handshaking or to control the multiplexer.
We're thinking of using a I2C port expander (TCA9554 ) to control a mux like a 74F257A.
Block diagram is at:
If there are any SPI experts out there willing to take a look at this provide some feedback it would be appreciated.
Again, the considerations are:
- We have no GPIOs still available.
- The I2C bus is too slow to use for reading the contents of the Flash.
- The UART is being used for something else.
- We want to read the Flash from both the Cortex M3's SPI port and from an external DAQ's SPI port.
- The Cortex M3 and the DAQ can only be SPI masters.