LT Spice question

The bootstrap pullup resistor is a load, and it pushes one of the output transistors into steady-state conduction.

John

them

What you can do in the bootstrap ramp circuit is make the follower opamp gain a bit more than 1, which makes the ramp curve upwards. Or add a resistor across the cap, which makes it curve down a little. One or the other of those can partially correct for any small native curvature in the output. The biggest contribution to curvature (aside from crappy opamps) is usually nonlinear junction capacitances.

Actually selecting the best curve-fixer resistor tends to be tedious.

The AD8014 only uses about 1.3 mA, which is maybe why it's so bad here. An AD8009-class part will yoink about 10x as much.

John

That's just the problem with behavioral models. Even some LT parts which are nearly all behavioral with some secret hooks don't. I found numerous discrepancies, some rather serious. Synchronizable switchers that didn't synchronize correctly, a comparator where I discovered a real bug in the silicon, things like that.

That is not to diss LTSpice or the models, one just has to not expect too much.

If you got the full model, warts and all, the simulation would take a very long time. On a start process of a switcher it can easily take a whole hour, the PC fans come on hard and the office temp inches up a degree or two. Not so great in the summer but right now that's ok.

--
Regards, Joerg

http://www.analogconsultants.com/

At the LT Spice seminar a few months ago, they warned about synchronous switchers. The netlists include warnings that the models don't allow synchronization.

Yes, that's the problem I've found using Spice. Its utility is severely compromised by lousy models. I guess I was spoiled by good models. ;-)

Like correct operation? ;-)

A whole hour? I remember overnight simulations. A cow-orker ran simulations that sucked down an entire mainframe for weeks (statistical runs). Better a long time than "phut". Right? ;-)

It would be kind of nice if their jig schematics contained a warning about that.

The ones in bikinis? :-)

It can be an issue. For example, a comparator had an undocumented flaw after power-up. I was the guy who found out, and only after layouts and prototype build :-(

This was a classic case of a behavioral model not telling the whole story. Wouldn't have happened with a full model because it was a chip design bug. If they ad full models I'd have found out at sim time.

I remember those days. Had to run the computer overnight a lot. But now I try to break circuits into palatable chunks.

--
Regards, Joerg

http://www.analogconsultants.com/

You don't read the Surgeon General's warning on all the models you use? ;-)

Nah, they've been bad for my health for >40 years.

Someone has to find those sorts of problems. It's one reason I don't like to do my own verification. Bad assumptions often get passed from design right through to the customer.

"But the computer said..."

Well, those *were* the palatable chunks.

On Fri, 16 Dec 2011 09:17:50 -0800, John Larkin wrote:

I played with your circuit a bit and i am not getting as fast a ramp, but i am a little closer to the described / shown physical circuit.

Version 4 SHEET 1 916 680 WIRE 656 -304 608 -304 WIRE 704 -304 656 -304 WIRE 608 -256 608 -304 WIRE 560 -240 -272 -240 WIRE 192 -224 96 -224 WIRE 96 -208 96 -224 WIRE 192 -192 192 -224 WIRE 608 -128 608 -176 WIRE 96 -112 96 -128 WIRE 192 -112 96 -112 WIRE 304 -112 272 -112 WIRE 304 -96 304 -112 WIRE 416 -96 304 -96 WIRE 304 -80 304 -96 WIRE 304 -80 176 -80 WIRE -272 -64 -272 -240 WIRE -224 -64 -272 -64 WIRE 176 -64 176 -80 WIRE 176 -64 -144 -64 WIRE 176 -48 176 -64 WIRE 208 -48 176 -48 WIRE 336 -48 272 -48 WIRE 336 -32 336 -48 WIRE 416 -32 336 -32 WIRE 560 -16 560 -192 WIRE -128 16 -192 16 WIRE 16 16 -48 16 WIRE 144 16 16 16 WIRE 272 16 224 16 WIRE 336 16 336 -32 WIRE 336 16 272 16 WIRE -192 48 -192 16 WIRE 96 64 96 -112 WIRE 16 80 16 16 WIRE 64 80 16 80 WIRE 272 96 272 16 WIRE 272 96 128 96 WIRE 336 96 272 96 WIRE 448 96 416 96 WIRE 560 96 560 -16 WIRE 560 96 528 96 WIRE -352 112 -416 112 WIRE -272 112 -272 -64 WIRE -272 112 -352 112 WIRE 64 112 -272 112 WIRE 560 112 560 96 WIRE 704 112 560 112 WIRE 560 128 560 112 WIRE 704 128 704 112 WIRE -272 144 -272 112 WIRE 560 208 560 192 WIRE 704 208 560 208 WIRE 560 224 560 208 WIRE -272 240 -272 208 WIRE 96 240 96 128 WIRE 96 368 96 320 =46LAG -272 240 0 =46LAG 560 224 0 =46LAG 192 -192 0 =46LAG 96 368 0 =46LAG -192 48 0 =46LAG 608 -128 0 =46LAG 656 -304 ERROR =46LAG -352 112 RAMP =46LAG 272 16 AMP =46LAG 560 -16 OUT SYMBOL cap -288 144 R0 WINDOW 0 71 15 Left 0 WINDOW 3 64 50 Left 0 SYMATTR InstName C1 SYMATTR Value 47p SYMBOL cap 544 128 R0 WINDOW 0 71 11 Left 0 WINDOW 3 65 47 Left 0 SYMATTR InstName C2 SYMATTR Value 47p SYMBOL ind 432 112 R270 WINDOW 0 32 56 VTop 0 WINDOW 3 5 56 VBottom 0 SYMATTR InstName L1 SYMATTR Value 1n SYMBOL res 432 80 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R1 SYMATTR Value 50 SYMBOL Opamps\\opamp2 96 32 R0 WINDOW 0 45 101 Left 0 WINDOW 3 30 139 Left 0 SYMATTR InstName U1 SYMATTR Value AD8014 SYMBOL voltage 96 -112 R180 WINDOW 0 53 71 Left 0 WINDOW 3 61 36 Left 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value 5 SYMBOL voltage 96 336 R180 WINDOW 0 69 70 Left 0 WINDOW 3 75 33 Left 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V2 SYMATTR Value 5 SYMBOL res 240 0 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R2 SYMATTR Value 249 SYMBOL e 608 -272 R0 WINDOW 0 66 42 Left 0 WINDOW 3 64 76 Left 0 SYMATTR InstName E1 SYMATTR Value 10 SYMBOL res -32 0 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R3 SYMATTR Value 500g SYMBOL res 288 -128 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R4 SYMATTR Value 330 SYMBOL res -128 -80 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R6 SYMATTR Value 330 SYMBOL res 688 112 R0 SYMATTR InstName R7 SYMATTR Value 100g SYMBOL zener 272 -64 R90 WINDOW 0 0 32 VBottom 0 WINDOW 3 32 32 VTop 0 SYMATTR InstName D1 SYMATTR Value 1N750 SYMATTR Description Diode SYMATTR Type diode SYMBOL cap 400 -96 R0 SYMATTR InstName C3 SYMATTR Value 100p TEXT -184 -176 Left 0 !.tran 0 30n 0 TEXT -200 -120 Left 0 !.lib AD8014.CIR TEXT -464 144 Left 0 !.ic v(RAMP)=3D0

?-)

The zener is not in conduction.

John

On Sat, 17 Dec 2011 16:14:05 -0800, John Larkin wrote:

You are right. This one uses a lower voltage "zener".

Version 4 SHEET 1 916 680 WIRE 560 -304 -272 -304 WIRE 656 -304 608 -304 WIRE 704 -304 656 -304 WIRE 192 -288 96 -288 WIRE 96 -256 96 -288 WIRE 192 -256 192 -288 WIRE 608 -256 608 -304 WIRE 560 -240 560 -304 WIRE 96 -224 96 -256 WIRE 96 -160 96 -176 WIRE 192 -160 96 -160 WIRE 304 -160 272 -160 WIRE 304 -144 304 -160 WIRE 416 -144 304 -144 WIRE 608 -128 608 -176 WIRE 304 -112 304 -144 WIRE 304 -112 176 -112 WIRE 416 -96 416 -144 WIRE -272 -64 -272 -304 WIRE -224 -64 -272 -64 WIRE 176 -64 176 -112 WIRE 176 -64 -144 -64 WIRE 416 -32 336 -32 WIRE 176 -16 176 -64 WIRE 224 -16 176 -16 WIRE 336 -16 336 -32 WIRE 336 -16 288 -16 WIRE 560 -16 560 -192 WIRE -128 16 -192 16 WIRE 16 16 -48 16 WIRE 112 16 16 16 WIRE 336 16 336 -16 WIRE 336 16 192 16 WIRE 400 16 336 16 WIRE 416 16 400 16 WIRE -192 48 -192 16 WIRE 96 64 96 -160 WIRE 16 80 16 16 WIRE 64 80 16 80 WIRE 336 96 128 96 WIRE 416 96 416 16 WIRE 448 96 416 96 WIRE 560 96 560 -16 WIRE 560 96 528 96 WIRE -352 112 -416 112 WIRE -272 112 -272 -64 WIRE -272 112 -352 112 WIRE 64 112 -272 112 WIRE 560 112 560 96 WIRE 704 112 560 112 WIRE 560 128 560 112 WIRE 704 128 704 112 WIRE -272 144 -272 112 WIRE 560 208 560 192 WIRE 704 208 560 208 WIRE 560 224 560 208 WIRE -272 240 -272 208 WIRE 96 240 96 128 WIRE 96 368 96 320 =46LAG -272 240 0 =46LAG 560 224 0 =46LAG 192 -256 0 =46LAG 96 368 0 =46LAG -192 48 0 =46LAG 608 -128 0 =46LAG 656 -304 ERROR =46LAG -352 112 RAMP =46LAG 400 16 AMP =46LAG 560 -16 OUT SYMBOL cap -288 144 R0 WINDOW 0 71 15 Left 0 WINDOW 3 64 50 Left 0 SYMATTR InstName C1 SYMATTR Value 47p SYMBOL cap 544 128 R0 WINDOW 0 71 11 Left 0 WINDOW 3 65 47 Left 0 SYMATTR InstName C2 SYMATTR Value 47p SYMBOL ind 432 112 R270 WINDOW 0 32 56 VTop 0 WINDOW 3 5 56 VBottom 0 SYMATTR InstName L1 SYMATTR Value 1n SYMBOL res 432 80 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R1 SYMATTR Value 50 SYMBOL Opamps\\opamp2 96 32 R0 WINDOW 0 45 101 Left 0 WINDOW 3 30 139 Left 0 SYMATTR InstName U1 SYMATTR Value AD8014 SYMBOL voltage 96 -160 R180 WINDOW 0 53 71 Left 0 WINDOW 3 61 36 Left 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value 5 SYMBOL voltage 96 336 R180 WINDOW 0 69 70 Left 0 WINDOW 3 75 33 Left 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V2 SYMATTR Value 5 SYMBOL res 208 0 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R2 SYMATTR Value 249 SYMBOL e 608 -272 R0 WINDOW 0 66 42 Left 0 WINDOW 3 64 76 Left 0 SYMATTR InstName E1 SYMATTR Value 10 SYMBOL res -32 0 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R3 SYMATTR Value 500g SYMBOL res 288 -176 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R4 SYMATTR Value 249 SYMBOL res -128 -80 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R6 SYMATTR Value 500 SYMBOL res 688 112 R0 SYMATTR InstName R7 SYMATTR Value 100g SYMBOL cap 400 -96 R0 SYMATTR InstName C3 SYMATTR Value 470p SYMBOL References\\LT1009 256 -16 R270 WINDOW 3 5 46 Left 0 SYMATTR InstName U2 TEXT -184 -176 Left 0 !.tran 0 30n 0 TEXT -200 -120 Left 0 !.lib AD8014.CIR TEXT -464 144 Left 0 !.ic v(RAMP)=3D0

?-)

Like a lot of things I've seen in spice. Of course, it's always possible you're introducing conditions at the bench that is not being placed in the spice simulation.

Btw, I used one of the LT current amps and was able to reproduce what you're getting. I was also able to remove it by increasing the (-) feed back R to 900 ohms, instead of the 249 you have.. For what ever that is worth.

Jamie

With a 1K resistor, I get an initial jump in the output ramp. At 250 ohms, it rings. That makes sense, but the sim shows neither effect. The AD8014 model is useless for optimizing the ramp linearity, or even demonstrating gross behavior, so it's back to soldering. The board is in a big rackmount chassis, and there are a jillion cables to disconnect and re-hook up, and JTAG stuff to reload, to change a resistor. Well, just like the olden days.

470 ohms seem about right. I still get a small jump and a hint of ringing, but it's over before I enter my active zone at +1 volt. I'm getting around 60 ps equivalent RMS time error on the ramp, good enough.

This board is just one of six in the box! And the customer is having kittens to get this installed. So good enough will have to do.

The argument had been made, in certain circles, that we should lay out a proto pcb and seed it with all the new/unknown/risky circuits on a big thing like this, and check them individually before we gerber the main board. Not a bad idea.

John

The LT1206 seems to show what you're getting. I would be willing to bet that the LT1206 model with some minor input values changed, could be used for for the AD version you're trying to use.

Jamie

I've talked to AD from time-to-time about modeling. Even showed them how to properly model GBW in an OpAmp. When I quoted doing a rather complex A2D at 4 days, they thought that too expensive... they're cheap-ass ;-)

And they wouldn't, even under NDA, let me see an actual schematic or netlist.

For my IBIS modeling customers I've demonstrated to them that my IBIS representations dead-on overlay the Spice results from their own netlist... they were very happy! ...Jim Thompson

--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
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Annoy a Liberal, Stand Them Up to a Blackboard and Ask Them to 
Show Their Math That Balances the Budget, Even After Taxing/Taking 
Everything the Rich Make... Then Punish Their Ignorance :-)

Don't clip the end of sentence please. So: "DO NOT PUT A SMALL CAPACITOR FROM THE INVERTING INPUT OF A CURRENT FEEDBACK AMPLIFIER TO ANYWHERE, ESPECIALLY NOT TO THE OUTPUT."

Now the next sentence is somewhat incomplete. "The capacitor on the inverting input will cause peaking or oscillations." should be more like : "A capacitor between the inverting input and GND will cause peaking while a capacitor between the inverting input and the output will cause oscillations."

While if I'm saying that I do have mine :-)

See the netlist bellow. The pencil & paper demonstration left as an exercise to the student, to parrot some people here :-)

Version 4 SHEET 1 1884 680 WIRE 304 -224 112 -224 WIRE 704 -224 304 -224 WIRE 1088 -224 704 -224 WIRE 1488 -224 1088 -224 WIRE 304 -208 304 -224 WIRE 704 -208 704 -224 WIRE 1088 -208 1088 -224 WIRE 1488 -208 1488 -224 WIRE 112 -192 112 -224 WIRE 304 -96 304 -128 WIRE 304 -96 272 -96 WIRE 352 -96 304 -96 WIRE 480 -96 432 -96 WIRE 704 -96 704 -128 WIRE 704 -96 672 -96 WIRE 752 -96 704 -96 WIRE 880 -96 832 -96 WIRE 1088 -96 1088 -128 WIRE 1088 -96 1072 -96 WIRE 1136 -96 1088 -96 WIRE 1264 -96 1216 -96 WIRE 1488 -96 1488 -128 WIRE 1488 -96 1472 -96 WIRE 1504 -96 1488 -96 WIRE 1664 -96 1584 -96 WIRE 112 -80 112 -112 WIRE 1088 -48 1088 -96 WIRE 384 -16 -32 -16 WIRE 784 -16 384 -16 WIRE 1168 -16 784 -16 WIRE 1568 -16 1168 -16 WIRE -32 32 -32 -16 WIRE 480 32 480 -96 WIRE 880 32 880 -96 WIRE 1264 32 1264 -96 WIRE 1664 32 1664 -96 WIRE 384 48 384 -16 WIRE 784 48 784 -16 WIRE 1168 48 1168 -16 WIRE 1568 48 1568 -16 WIRE 304 64 304 -96 WIRE 352 64 304 64 WIRE 704 64 704 -96 WIRE 752 64 704 64 WIRE 1088 64 1088 32 WIRE 1136 64 1088 64 WIRE 1488 64 1488 -96 WIRE 1536 64 1488 64 WIRE 480 80 480 32 WIRE 480 80 416 80 WIRE 880 80 880 32 WIRE 880 80 816 80 WIRE 1264 80 1264 32 WIRE 1264 80 1200 80 WIRE 1664 80 1664 32 WIRE 1664 80 1600 80 WIRE 352 96 320 96 WIRE 752 96 720 96 WIRE 1136 96 1104 96 WIRE 1536 96 1504 96 WIRE 320 112 320 96 WIRE 720 112 720 96 WIRE 1104 112 1104 96 WIRE 1504 112 1504 96 WIRE -32 128 -32 112 WIRE -32 128 -96 128 WIRE -96 144 -96 128 WIRE -32 144 -32 128 WIRE -32 288 -32 224 WIRE 384 288 384 112 WIRE 384 288 -32 288 WIRE 784 288 784 112 WIRE 784 288 384 288 WIRE 1168 288 1168 112 WIRE 1168 288 784 288 WIRE 1568 288 1568 112 WIRE 1568 288 1168 288 FLAG -96 144 0 FLAG 320 112 0 FLAG 1504 112 0 FLAG 112 -80 0 FLAG 208 -96 0 FLAG 1408 -96 0 FLAG 1104 112 0 FLAG 1008 -96 0 FLAG 720 112 0 FLAG 608 -96 0 FLAG 480 32 Out1 IOPIN 480 32 Out FLAG 880 32 Out2 IOPIN 880 32 Out FLAG 1264 32 Out3 IOPIN 1264 32 Out FLAG 1664 32 Out4 IOPIN 1664 32 Out SYMBOL Opamps\\LT1395 384 16 R0 SYMATTR InstName U1 SYMBOL voltage -32 16 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V1 SYMATTR Value 5V SYMBOL voltage -32 128 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V2 SYMATTR Value 5V SYMBOL res 448 -112 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R1 SYMATTR Value 250 SYMBOL res 1600 -112 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R2 SYMATTR Value 250 SYMBOL res 288 -224 R0 SYMATTR InstName R3 SYMATTR Value 250 SYMBOL res 1472 -224 R0 SYMATTR InstName R4 SYMATTR Value 250 SYMBOL voltage 112 -208 R0 WINDOW 0 -78 17 Left 2 WINDOW 3 -239 100 Left 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V3 SYMATTR Value PULSE(0 2 10n 1n) SYMBOL cap 272 -112 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C1 SYMATTR Value 50p SYMBOL cap 1472 -112 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C2 SYMATTR Value 20p SYMBOL res 1232 -112 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R5 SYMATTR Value 250 SYMBOL res 1072 -224 R0 SYMATTR InstName R6 SYMATTR Value 250 SYMBOL ind 1072 -64 R0 SYMATTR InstName L1 SYMATTR Value 10n SYMBOL cap 1072 -112 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C3 SYMATTR Value 50p SYMBOL res 848 -112 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R7 SYMATTR Value 250 SYMBOL res 688 -224 R0 SYMATTR InstName R8 SYMATTR Value 250 SYMBOL cap 672 -112 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C4 SYMATTR Value 100p SYMBOL Opamps\\LT1395 784 16 R0 SYMATTR InstName U2 SYMBOL Opamps\\LT1395 1168 16 R0 SYMATTR InstName U3 SYMBOL Opamps\\LT1818 1568 80 R0 SYMATTR InstName U4 TEXT -24 -264 Left 2 !.tran 0 100n 0 1n TEXT 616 -328 Left 2 ;LT1395: CFB opamp BW = 400MHz TEXT 1408 -336 Left 2 ;LT1818: .VFB opamp GBW = 400MHz

--
Thanks,
Fred.

If you move C1 to across R1 it's beautifully stable, for most any value of C1. So much for theory!

Maybe all CFA models are bad.

John

In my experience both can cause oscillation.

As long as our wives are around only their reasons really count :-)

Ok, now move C1 across R1 instead of ground -> Total stability. And that ain't happ'nin in real life. I do not trust behavioral models for this kind of stuff.

Does anyone have a SPICE model for a CFB amp that is 100% down-to-the-bone tried and true and has zero behavioral elements in there?

Even then it's risky. CFB amps aren't all the same. Some really do not like G=+1 operation while others are ok in that configuration.

[...]

--
Regards, Joerg

http://www.analogconsultants.com/

[...]

Strange, I tried exactly the same thing after loading Fred's file. And I was not surprised about the result.

Behavioral ones usually are, they are no good to really ascertain stability. For switchers behavioral can be ok but for opamps I really don't like that.

--
Regards, Joerg

http://www.analogconsultants.com/

If there were one, full of transistors and caps and such, it would probably run very, very slowly.

When I sim circuits, I generally use a VCVS to simulate an opamp, with an RC on the output if bandwidth matters. Runs fast!

G=1 usually works fine if you use the right feedback resistor. I'm groveling around for 0.1% linearity on a 16 ns ramp, so that's a little delicate.

The AD8014, with 1.4 mA supply current, barely qualifies as a CFB.

John

Not in your case because you only want to look at one lone ramp. If you want to sim a switcher with start-up and all that in non-behavioral, different thing. BTDT. I used that day to repair a deck post while the sim was running inside.

Why are there no aluminum deck posts that don't rot?

But it'll tell lies :-)

In this case it's almost tempting to try something more unorthodox. Use a nicely linear RF amp or just a follower with enough amplitude range as a 1:1 buffer and then servo out the DC error with an el-cheapo opamp. Costs less, too, but I guess that's not a concern here.

--
Regards, Joerg

http://www.analogconsultants.com/