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LT Spice diode model

Hi,

I'm adding a diode model, SMS7621-079, to the LT Spice standard.dio file. My diode data sheet shows Spice parameter Cjo = 0.1 pF, but the parts have a typical capacitance of 0.22 pF. I assume the extra capacitance is the package, which wouldn't behave like Cjo.

I don't see an obvious place, in the model script, for the package c. There are some "sidewall" params, but I don't know how they behave. I guess I could add discrete caps to my schematic, but that's inelegant.

There appears to be no way to specify diode inductance! I'd have to do that outboard, too.

Any thoughts?

(I'm designing a diode 2-input AND gate! I never took any digital design courses, but I recall seeing a diode AND on a blackboard as I walked pass the class in the hallway. I'd use the Hittite part, but it's almost $600.)

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John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com
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John Larkin
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pass the

Oh come on. This modeling issue has been discussed. You must use the subcircuit modeling method to include the packaging parasitics.

?-)

Reply to
josephkk

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