Linearization Question

Last time I thought in that direction I got samples from THAT corporation.

D from BC myrealaddress(at)comic(dot)com BC, Canada Posted to usenet sci.electronics.design

I'm rolling my own chip that has no bipolars. Bipolar devices make it trivial.

...Jim Thompson

A differential pair of MOSFETs has the same sigmoid transfer characteristic as any other diff pair; and if you modulate the source current, the gain goes down. So, the same current mirrors as in (for instance) CA4046, and some suitable cascade of low-gain diff pairs, can do compression. I'd almost prefer to do it with switches and resistors, though: attenuation with resistors is predictable and MOSFETs were born to switch.

You're talking of a gain stage.

I need a MOSFET-based variable resistor that is linear in the first AND third quadrant.

...Jim Thompson

Gain, yes. Greater than unity gain, not necessarily. That sigmoid transfer function is close to linear (resistor-like) in two quadrants, but it is a tad limited in range.

=A0 =A0 ...Jim Thompson

=A0 | =A0 =A0mens =A0 =A0 |

=A0 | =A0 =A0 et =A0 =A0 =A0|

=A0|

=A0 =A0 =A0 |

Cannot help much myself, but figs. 74-78 of the following ENORMOUS pdf (a scanned document) might provide some clues. It's a patent about MOSFET implementation of complete radio receivers, including audio attenuators and AGC.

df

-- Joe

Thanks, Joe!!

...Jim Thompson

"Jim Thompson" a écrit dans le message de news: snipped-for-privacy@4ax.com...

What's wrong with the 2 resistors trick? a JFET is quadratic (almost) as well as a MOSFET (almost) is.

Or do you think of any other trick.

-- Thanks, Fred.

Your "2 resistors trick" is spot on. I just pasted two resistors into the simulator (AC-coupled the feedback one so it didn't drop the control voltage), then twiddled the ratio until I had symmetry.

Interesting, it's different from the 1:1 you usually see with a JFET...

I have 190K (feedback) and 1Meg from the control.

One digit asymmetry at the third place to the right of the decimal point!

Thanks for the _push_ ;-)

...Jim Thompson

What's the two resistors trick? Could you post it, or a page reference in AoE?

Danke.

p140, except, for a MOSFET, I used 190K for the upper resistor, 1Meg for the resistor from Vcontrol to the gate. I also have a capacitor in series with the 190K.

...Jim Thompson

"Jim Thompson" a écrit dans le message de news: snipped-for-privacy@4ax.com...

Wow, great!

But I'm somewhat surprised at the resistors ratio. This trick works for a JFET because it has an almost quadratic Id (some that I precisely measured had a 1.85 exponent and required tweaking the resistor ratio, but just a bit). I just mentionned this because I knew (maybe erroneously) that it'd be integrated and you'd have small geometry mosfets (hence they won't work in the subthershold region were they aren't quadratic anymore and they don't have the parasitic diode too). Now the ratio you came to seems to indicate otherwise...

It'd be interesting to know more about the mosfet and its bias/working conditions... Maybe you can post its parameters (but I'm not holding my breath there).

-- Thanks, Fred.

"Jim Thompson" a écrit dans le message de news: snipped-for-privacy@4ax.com...

Wow, great!

But I'm somewhat surprised at the resistors ratio. This trick works for a JFET because it has an almost quadratic Id (some that I precisely measured had a 1.85 exponent and required tweaking the resistor ratio, but just a bit). I just mentionned this because I knew (maybe erroneously) that it'd be integrated and you'd have small geometry mosfets (hence they won't work in the subthershold region were they aren't quadratic anymore and they don't have the parasitic diode too). Now the ratio you came to seems to indicate otherwise...

It'd be interesting to know more about the mosfet and its bias/working conditions... Maybe you can post its parameters (but I'm not holding my breath there).

-- Thanks, Fred.

Not real small, well-known 0.6u BiCMOS process

Device model....

.model n nmos ( tlev = 2

+vnds=-1.09 +level = 7 tnom = 21

• ; PSpice uses Level=7 for BSIM3, other simulators may have other
• ; number designations

+binunit = 0 mobmod = 1 version = 3.1 +capmod = 1 noimod = 1 xpart = 0 +hdif = 0.65e-06 +nqsmod = 0 +cgbo = 3e-10 k1 = 8.8e-01 tox = 1.35e-08 +cgdo = 3e-10 k2 = -0.1127 u0 = 503.71 +cgso = 2.5e-10 lint = 2.70e-08 vth0 = 0.655 +cj = 0.00047 nch = 1.5e+17 wint = 1.00e-07 +cjsw = 3.3e-10 rdsw = 1560 xj = 1.50e-07 +js = 0.03 rsh = 90 +a0 = 0.8201 dvt1w = 5.20e+07 pdiblcb = 0.0854 +a1 = 0 dvt2 = -0.00392 prwb = 0.2205 +a2 = 1 dvt2w = -0.001 prwg = -4.40e-06 +ags = 0.1928 dwb = 9.4e-09 pscbe1 = 5.50e+08 +alpha0 = 0 dwg = -9.00e-09 pscbe2 = 3.40e-05 +b0 = 1.62e-06 eta0 = 0.2321 pvag = 0.1013 +b1 = 1.83e-06 etab = -0.0158 ua = 3.4e-14 +beta0 = 0 k3 = 62.068 ub = 2.02e-18 +cdsc = -0.00649 k3b = -29.643 uc = 2.97e-11 +cdscb = -0.00132 keta = -0.00769 voff = -0.1381 +cdscd = 0.00074 lu0 = 4.40e-05 vsat = 1.05e+05 +cit = 0 lvsat = -0.00249 w0 = 1.20e-06 +delta = 0.01 lwl = -1.79e-19 wr = 1 +drout = 0.00191 nfactor = 0.7187 wu0 = -3.02e-05 +dsub = 0.5356 nlx = 1.56e-07 wvsat = -0.00719 +dvt0 = 9.49 pclm = 1.507 wwl = -7.5e-20 +dvt0w = 1.997 pdiblc1 = 1.11e-03 +dvt1 = 0.4585 pdiblc2 = 8.60e-04 +at = 19000 nj = 2.2 uc1 = 1.38e-11 +kt1 = -0.391 prt = 647.67 ute = -1.757 +kt1l = 2.39e-08 ua1 = 2.92e-10 xti = 3 +kt2 = -0.0752 ub1 = -4.6e-19 +cf = 0 clc = 1.00e-07 mjsw = 0.336 +cgdl = 0 cle = 0.6 pb = 0.897 +cgsl = 0 elm = 5 pbsw = 0.892 +ckappa = 0.6 mj = 0.3375 tt = 0.000000016 +af = 1 kf = 2.00e-27 )

Device size: L=1u, W=250u M=10

Must stay resistive at ±2mA current signal drive, decent to ±5mA

As usual I can't say anything about the application right now, maybe in six months, or so.

...Jim Thompson

"Jim Thompson" a écrit dans le message de news: snipped-for-privacy@4ax.com...

Well, sure, not small WRT todays small geometries, but I had in mind the discretes we, simple mortals, have access to :-)

Cool! I'll have a look, I'm curious really about this. Thanks.

-- Thanks, Fred.