it oscillates!

A response from my friend (apparently I misunderstood him somewhat, but we had been talking about clean power for an RF front-end):

: Nah, didn?t use gyrators in RF, I used them in telephony

: For RF test instrument I used an op-amp based current source

: gyrator looks like an L. so with a C on the output that?s two pole. : Don?t understand where the single pole comes from? : Yes, it?s not perfect. Generally use a darlington in order to reduce : requirement for large Cs

: As I said, gyrator for lower freq and series L for RF

: don?t understand what he means by ?come out of the collector?. the : gyrator is effectively a two terminal device....

I objected to him adding C on the output, forming a series resonator...

CH

Reply to
Clifford Heath
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Fair enough, until the RC sneak path gets you. It starts out as two poles but it's one pole asymptotically. I mostly use cap multipliers to get rid of SMPS hash, and they're the bomb for that.

Usually not needed, at least for signal levels. Devices such as the

2SD2114 have betas of 1000ish with reasonably decent saturation behaviour up to 500 mA or so.

If you wrap an op amp round it to get better current regulation, that breaks the symmetry. For a common-cathode diode laser, you want a PNP current source with the base bypass caps going to the positive supply. The control current comes out via the emitter and the bypass caps from the base to the far end of the emitter resistor, so if you want the output to be decoupled from the control current, you need to come out of the collector.

The output C has to be fairly huge, whereas to get the same effect on the base of a cap multiplier, you need a capacitor 1/beta times smaller. Big difference. Plus you can get any order you like with a few extra

0402 Rs and Cs. Usually two or three poles are enough, since you can start the rolloff at very low frequency.

It's also possible to use a two-stage cap multiplier, with the base filtering strings in series...that can get rid of most of the V_BE drop of the second stage, but needs fairly careful management.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC / Hobbs ElectroOptics 
Optics, Electro-optics, Photonics, Analog Electronics 
Briarcliff Manor NY 10510 

http://electrooptical.net 
http://hobbs-eo.com
Reply to
Phil Hobbs

Between oscillations, the negative grid bias is creeping up with a decaying exponential, and gain is approaching 1. The voltage/gain is a complex combination of past states, residual ringing from past cycles, and noise. Meets my definition for chaos. The result, without an RF signal, is high level noise at the output.

I think that a single FPGA pin could be used in a similar manner to make a pretty good true-random-number source.

--

John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

I've done a little military rangefinder work, with a diode-pumped YAG but no q-switch. It fired when it got pumped enough. Maybe it had a passive q-switch. I only did the diode driver.

--

John Larkin         Highland Technology, Inc 

Science teaches us to doubt. 

  Claude Bernard
Reply to
jlarkin

...

Could you trigger it regularly (maybe every millisecond) even when not receiving any external trigger, in order to keep it trimmed for frequency in spite of tempco etc.?

I can see that if a real trigger event arrives during one of your extra calibration runs, that could be inconvenient. Perhaps you could have two of these oscillators and ping-pong between them so that there is always one ready for a real trigger but both of them have fairly fresh frequency calibration. I guess the two oscilltors might each need their own power supply filters, output buffers with good reverse isolation and separate shield cans, to stop them from interacting.

Reply to
Chris Jones

That's appealing, but we never know when a customer might trigger it, so we need to be ready at all times. We might find some low-risk way to sneak in a fake shot now and then, say if it hasn't been triggered for 10 hours or something.

That might work, but it's more complex than I'd like. We'd have to calibrate for the prop delay of each signal path, and any difference there becomes jitter.

For now, I'm trying to build a really good oscillator. I don't understand the Colpitts, especially how the gain and the amplitude limiting mechanisms affect frequency. So I'm combining a lot of Spice with experimental confirmation. It's tedious, but this lockdown is the ideal time to do something like this.

I'm seeing a strong coupling between oscillation amplitude and frequency, which is surely related to the limiting mechanism and creates high temperature and power supply sensitivies. The usual super-soft AGC type mechanisms won't work in a burst oscillator.

--

John Larkin         Highland Technology, Inc 

Science teaches us to doubt. 

  Claude Bernard
Reply to
jlarkin

When I was involved in cellphone local oscillator VCOs a long time ago, we used a digital control loop to adjust the amplitude of some of them (for GSM, not the ones for W-CDMA). Basically a current-output DAC, heavily filtered, driving the oscillator core, and a rectifier to measure the oscillation amplitude. I think most of it is probably described in US7038552. IIRC just letting the amplitude self-limit would give much worse supply rejection (as well as poorly-defined tuning sensitivity and greater-than-necessary supply current for most temperatures).

I think you could use a digital amplitude control loop with a burst or gated oscillator, though of course you need it to run and calibrate itself often enough to have a decent DAC setting already known before each burst. You could cheat a bit and add a temperature sensor near the oscillator, and characterise the DAC code for correct amplitude, vs temperature, so your guesses would be very good after that.

Keeping the non-linear capacitances in the oscillator circuit small will certainly help with supply and temperature sensitivity. I recall that making the active device(s) and varactors in the oscillator as small as possible is a good start. At least on chips, switching in fixed capacitors with NMOS fets was better than using larger varactors.

Reply to
Chris Jones

I've been musing on the ideas about differential equations and initial conditions. If an LC oscillator is limited by a hard clamp, during the clamp time it has a different equation from the sine wave. The voltage is frozen in time, with a linear current decay in the inductor, for the clamp duration. It resumes the sine equation after the clamp current decays to zero. So we are alternating between two equations at a duty cycle that depends on the loop gain and things.

Plus the capacitive nonlinearities that you mention. I should go back to BFT25s and find a soft limiter.

Spicing some simple softer limiters helps, but not dramatically. Adding more parts adds more nonlinear capacitors!

Yikes, a unidirectional hard clamp might actually be better because it uses the other equation for a shorter time!

I might try some brute feed-forward compensations, namely vary the hard clamp level as a function of mumble mumble.

We don't care much what the frequency is. We can measure it and use whatever we get, but after that I want it to be repeatable to a few hundred PPM forever. So switching some fixed caps doesn't help.

We did a few oscillators where we did want a defined frequency, so we combined a Maxim flecap IC with a varicap. The software tuned the flecap at powerup; I wrote that code in assembly!

Never Buy Maxim. They discontinued the flecap and don't even acknowledge the part number any more.

formatting link

--

John Larkin         Highland Technology, Inc 

Science teaches us to doubt. 

  Claude Bernard
Reply to
jlarkin

Figuring out a clamp arrangement whose current peaks are in phase with the tank current should minimize jitter and frequency drift. Maybe something like another BFT25A driven from the oscillator's emitter via an RC, with its collector connected to the tank (maybe tapped down a bit). A voltage offset between the two transistors could control the final amplitude. I'd need to think a bit to find a good way to stabilize the first cycle or two at the same amplitude.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC / Hobbs ElectroOptics 
Optics, Electro-optics, Photonics, Analog Electronics 
Briarcliff Manor NY 10510 

http://electrooptical.net 
http://hobbs-eo.com
Reply to
Phil Hobbs

circuit for measuring the equivalent loss resistance of a quartz resonator using a conventional multimeter

series resonance mode

formatting link

all good health

Dmitriy

Reply to
plastcontrol.ru

I'm going back to basics, Spicing a tank, negative resistor, and ideal or exponential diode clamp. Maybe the ideal case doesn't scale so is useless. Gotta think about that, or just try it.

The top of a natural sine wave is flat, and a diode clamp is flat, so the equations are not totally different.

--

John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

Are those two shiny glass things mesfets?

Just kidding, but do people still make mesfets? We used a lot of the CLYx parts, long gone now.

Then we used phemts, also gone.

Glass vacuum-sealed crystal:

formatting link

--

John Larkin         Highland Technology, Inc 
picosecond timing   precision measurement  

jlarkin att highlandtechnology dott com 
http://www.highlandtechnology.com
Reply to
John Larkin

in 2010 the MESFET transistor was at hand. it works as a controlled resistor depletion mode phemt transistor suitable

Reply to
plastcontrol.ru

Speaking of basics, a diode that clamps has variant bias on it, and a biased diode is a variable capacitor. Weren't you concerned with freqhency stability? Don't do AM if you don't want FM.

A delay-line oscillator would have frequency independent of amplitude, though.

Reply to
whit3rd

On Mon, 20 Apr 2020 17:39:22 -0700 (PDT), whit3rd wrote:

My goal is to have the oscillator start instantly at some amplitude and oscillate forever at exactly the same amplitude. If every cycle is the same amplitude, I needn't worry about AM-FM effects.

Any oscillator needs an amplitude limiting mechanism.

The HP5370 counter and their time synthesizer used triggered delay-line oscillators. They were not very frequency stable, so they ran them all the time between triggers, continuously phase-locked. When they got a trigger, a one-shot would quench the oscillator, for

75 ns as I recall, and then restart it. That worked but limited system rep-rate.

Here's the basic sim:

Version 4 SHEET 1 992 680 WIRE 16 80 -272 80 WIRE 144 80 16 80 WIRE 208 80 144 80 WIRE 272 80 208 80 WIRE 336 80 272 80 WIRE 480 80 400 80 WIRE 672 80 608 80 WIRE 736 80 672 80 WIRE -272 128 -272 80 WIRE 16 128 16 80 WIRE 144 128 144 80 WIRE 272 128 272 80 WIRE 480 128 480 80 WIRE 608 128 608 80 WIRE -272 256 -272 208 WIRE 16 256 16 208 WIRE 16 256 -272 256 WIRE 144 256 144 192 WIRE 144 256 16 256 WIRE 272 256 272 208 WIRE 272 256 144 256 WIRE 480 256 480 208 WIRE 480 256 272 256 WIRE 608 256 608 208 WIRE 608 256 480 256 WIRE 144 288 144 256 FLAG 144 288 0 FLAG 208 80 LC FLAG 672 80 CLOCK SYMBOL ind 256 112 R0 WINDOW 0 -45 41 Left 2 WINDOW 3 -40 67 Left 2 SYMATTR InstName L1 SYMATTR Value 1 SYMBOL cap 128 128 R0 WINDOW 0 -51 26 Left 2 WINDOW 3 -43 54 Left 2 SYMATTR InstName C1 SYMATTR Value 1 SYMBOL res 0 112 R0 WINDOW 0 -48 41 Left 2 WINDOW 3 -54 72 Left 2 SYMATTR InstName R1 SYMATTR Value -30 SYMBOL current -272 208 R180 WINDOW 0 -65 4 Left 2 WINDOW 3 -222 -26 Left 2 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName I1 SYMATTR Value PULSE(0 9 1 0 0 9m) SYMBOL diode 336 96 R270 WINDOW 0 -31 35 VTop 2 WINDOW 3 -36 35 VBottom 2 SYMATTR InstName D1 SYMATTR Value Dx SYMBOL voltage 480 112 R0 WINDOW 0 -74 79 Left 2 WINDOW 3 -68 108 Left 2 SYMATTR InstName V1 SYMATTR Value 1 SYMBOL bv 608 112 R0 WINDOW 0 50 77 Left 2 WINDOW 3 17 116 Left 2 SYMATTR InstName B1 SYMATTR Value V=.5*tanh(9K*V(LC)) TEXT -560 240 Left 2 !.tran 0 300 0 1m TEXT -616 200 Left 2 !.model Dx D(Ron=0 Vfwd=0) TEXT -608 104 Left 2 ;Hard-Clipped LC Oscillator TEXT -576 144 Left 2 ;J Larkin Apr 20 2020

With an ideal diode, the positive peaks are flat, and get wider as the gain goes up, namely the negative resistance goes down. The inductor current is visually a perfect sine, but that's an illusion, as the part near the positive zero crossing is actually a straight line.

Adding Ron in the diode softens the peaks and makes more swing but doesn't change the frequency radically. So the whole thing looks fairly forgiving.

The DPLL is more interesting, namely phase-locking an arbitrary-frequency oscillator to a 10 MHz OCXO in about a microsecond.

--

John Larkin         Highland Technology, Inc 

Science teaches us to doubt. 

  Claude Bernard
Reply to
jlarkin

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