isolated DC/DC converter

Bah. They probably set their advertising tariffs by the number of downloads. Common bean-counter tactics.

Jeroen Belleman

Reply to
Jeroen Belleman
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Yikes! That circuit has two states, working and not-working.

John

Reply to
John Larkin

Is

how do you figure that?

Btw, that isn't the exact circuit that was in use but is the concept of how it works.

THe sense R is connected to the (+) rail as with the pull up R, I just didn't draw all of the circuit, I'd figure any one that knew something would know that and fill in the obvious :)

When the primary saturates to the current point you need it'll drop the voltage at the sense R and generate a pulse that flips /Q Q which will then drive it the other way and start the cycle all over again. (push pull)

It works fine for a low current isolated supply. I used a D-FF not a master sleeve like above.. That was just something I picked from that ASC program. And may of also used a transistor to drive the Clk input, It's been a while..

Jamie

Reply to
Jamie

Is

Just look at it. It has a hangup state, with the transformer CT low and the flipflop clock input high. It would take luck at powerup for it to not get into that state.

It's like one of those hairball one-shot circuits that runs pulses around in circles, started up at powerup somehow. If it ever messes up once, it's dead.

Something like a schmitt trigger gate oscillator feeding a transformer would be safe.

John

Reply to
John Larkin

Is

I don't know what to tell you john except that it has worked for me with no problems. What else can I say?

Jamie

Reply to
Jamie

Maynard A Philbrook JR, AKA 'Jamie' doesn't know Schmitt!

--
You can't have a sense of humor, if you have no sense.
Reply to
Michael A. Terrell

I don't think so. It would take little circuitry to guarantee startup conditions for the J-K or the D FF configuration. Especially if set or reset inputs are available. Play with it a bit.

Reply to
josephkk

That circuit is not a good one. One power supply glitch, or somebody nearby with a cell phone, or a small ESD event, and the whole thing goes up in smoke. It's far easier to design a reliable circuit, i.e. one that will recover from such things, than it is to bandage a bad one. It's not as though there's a shortage of good ways to do this.

Cheers

Phil Hobbs

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Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics

160 North State Road #203
Briarcliff Manor NY 10510
845-480-2058

hobbs at electrooptical dot net
http://electrooptical.net
Reply to
Phil Hobbs

It seems like the thread is getting a little hacked up..

I'll say it one more time, that isn't the exact circuit I used! That was a conception circuit to show the use of the /Q and Q outputs.

I used a spare on the board. The Feed back from the CT was used to shape the signal a little to remove noise on the corners. The pull up was from a already operating signal in the circuit.

That was a last minute hack I did because I needed a small isolated source and what better place to get it, from a un-used FF as a bridge type driver.

But as it turns out, I needed the sense R and cap to cause a little delay on the transitions to help clean up the signal.

As far as self oscillating ? I've done that too, but not in that configuration.

Jamie

Reply to
Jamie

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