I'm using the USRP2 to prototype a design. The transmitter's FPGA must generate a BPSK modulated signal that is chipped with a gold code at
10.23 Mcps. It will perform a digital filter to filter out the sidebands. After the DAC which is sampled at an integer division of
100 MHz, the IF filter is a low-pass filter that has half power at roughly 25 MHz, and the upconverter is an AD8349 IQ modulator.
The AD8349 will work at baseband or IF. My question is, why should I choose one over the other? The LO for the upconverter is driven by a fractional PLL, which itself is locked to a 100 MHz reference. This gives me MANY choices for IF. But if the bandwidth of the IF filter is
25 MHz, then I guess an appropriate choice is 12.5 MHz IF, which is also 8 times the sample rate.
So it seems like my choices for transmit are 0 IF, or 12.5 MHz IF. Which one and why?
Also because it is a BPSK signal I think I can just generate I and leave Q at 0. Is this correct?
I have roughly the same question for the receiver, which has a very similar architecture (but in reverse of course). An I/Q demodulator will downconvert to IF or baseband. The downconverted signal will have some unknown frequency offset due to reference oscillator differences (and possibly doppler). This residual will be removed in a PLL within the FPGA. So again should I shoot for 0 IF, or 12.5 MHz IF (plus residual) in the downconverter? Why?
Thanks again for your help.