Help with high input impedance amp.

Am 06.11.2022 um 01:59 schrieb Lamont Cranston:

A gate-resistor greater than 10 MOhm on sFET is stupid.

Am 06.11.2022 um 01:59 schrieb Lamont Cranston:

Bootstrapping only increases the impedance of the voltage devider.

Well this is interesting, the tried and proven schematic I showed before,

the transistor, a 2N3644 drawn as a NPN is actually a PNP. So, is the part # wrong or is the transistor drawn wrong? Ft is a little low at 100MHz, maybe wrong #. Mikek

Figure 15 pF per square inch for 0.062 thick FR4, side to side. That's tiny for, say, a 100x100 mil pad.

Am 06.11.2022 um 20:47 schrieb Lamont Cranston:

The 2N3644 is an PNP-type. So it is wrong.

High impedances basically don't exist at high frequencies, certainly not with TO92 jfets. His input connector might be a couple of pF.

The data sheets of that fet don't seem to specify capacitances. Or much of anything.

Am 06.11.2022 um 21:16 schrieb John Larkin:

The real part of the impedanz at 10 MHz is about 1.6 kOhm The imag part of the impedanz at 10 MHz is about 20 kOhm

I ran into a couple that didn't even show pin out! And this that is right, but it's wrong.

Mikek

Cool! Guess that shows that after 50 years getting copied from databook to databook nobody yet tried to build it. As JL has said before a lot of rubbish is printed.

piglet

Here's part of a high input impedance circuit I built a long time ago. The input has a 17 times attenuation and it followed by an amp with a gain of 17. Because there is no data on the BF256C, and this fellow says there is a 17 x attenuation, that would make it 5.1pf of gate capacitance. (0.3pf input capacitor) What would you figure the input impedance of this is at 30MHz. It is built hanging in the air.

I'll get it out to test. I'm sure the 17 x amp is not going to make it 30MHz. But the first FET, maybe. Mikek

Am 06.11.2022 um 21:54 schrieb Lamont Cranston:

The gate-capacitance of a sFET BF256C is about 0.8 pF.

Possibly a lot higher z when used as a follower.

Am 06.11.2022 um 22:01 schrieb John Larkin:

I watched into the Zin in LTSpice of one of my follower.

Do you have a reference for that?

I get 15.4 attenuation ratio, input to the source of the fet @1MHz.

The fet source goes to a 100nF cap and about 500Ω to ground. Mikek

Am 06.11.2022 um 22:48 schrieb Lamont Cranston:

As I wrote above the imag part of the input impedanz is about 20 kOhm and the real part is about 1.6 kOhm at 10 MHz on a BC256C as follower.

I have checked that in one of my LTSpice simulations.

That means Cin=1/(20 kOhm*2*PI*10 MHz) = 0.79 pF.

BTW the Cis of a BF556C is 1.7 pF.

I see no reason why this wouldn't work, if constructed correctly. It's a source follower followed by an emitter follower, so we expect a gain a little below unity. The gate is biased to 9V or so, but you shouldn't try to measure that directly because the DC impedance is too high.

The source should be a little above that, 11v maybe, and the NPN emitter about 0.7V below that. You *can* measure that: The impedance there is low enough. The drain resistor drops about 11V, same as the source resistor, so that Vds ends up about 8V, a tad high, but acceptable. There's 200mW dissipated in the NPN, so it will get hot, probably too hot. Increasing the emitter resistor would help. Adding a resistor in the collector lead would help too. Bypass the collector to GND if you do that.

With a 30V overall supply voltage, I'd probably make it rise gently, to prevent transients stressing the semiconductors.

The two capacitors going back from the NPN emitter are bootstraps, the top one reducing the effect of Cgd of the JFET, and the bottom one increasing the effective impedance of the gate resistor.

I'd expect the input impedance to be in the 100 MOhm ballpark in parallel with a fraction of a pF. Any additional capacitive stuff hanging on the input, tracks, pads, connectors, cables, whatnot, adds to that, of course.

It should easily reach a -3dB bandwidth of a few tens of MHz, though of course, beyond a few kHz, the input impedance is dominated by the input capacitance.

Jeroen Belleman

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** Bootstrapping the gate resistor on a JFET might seem like a neat way to get a very high input resistance. A common application for such is a pre-amp for a condenser mic capsule - which is essentially a charged 50pF capacitor. Flat response down to below 20Hz means the input resistance needs to be about 500Mohms. Back in the day I tried the idea out in practice and found a major drawback - noise ! Positive feedback adds lots of it to the boostrapped resistor. Secondly, compared to using a 500M or 1Gohm resistor, the capacitance of the capsule cannot attenuate noise at the JFET gate near as well. Though thermal noise increases with resistor value, the -6dB / oct attenuation by a parallel capacitor attenuates it more.

..... Phil

You can avoid getting silly numbers for the reading at A by comparing it with a reference voltage taken off a potentiometer in the classic bridge fashion. No current flows (= no voltage difference) when Vref = Vtest.

Why do you actually want a very high impedance front end amplifier if your signal source is 50ohm?