Help with high input impedance amp.

I'm no expert at this sort of stuff, but it does appear to be a high impedance input to me. The voltage follower with a bit of positive feedback should boost the impedance significantly. The 100pF cap would provide more feedback at higher frequencies, raising the input impedance further.

It will be interesting to see what others have to say.

Is the fet connected right?

My first thought is gate-drain capacity. Can you add a resistor and capacitor and bootstrap the drain like that circuit we discussed back in late September?

piglet

And/or is it still a working FET?

If the gate isolation has been damaged then current will leak from it.

Even under the most pessimistic assumptions about wrong resistor values its input impedance should be at least R3 ~ 20M (or whatever value is there)

OP may want to try out the much simpler idealised common drain circuit to see if his FET is still a working FET. Rin 33k says that it isn't.

My instinct is that the circuit as built cannot be the same as the circuit diagram since the T1 pins are connected to nodes with voltages

S 24v G 3.8v (via R3= 20M) measured 1.5v but should be ~4.5v D 8.55v

I reckon path AB Gate to Drain now has a ~30k resistance. But I can't explain the low DC voltage at A.

My method to check input impedance: I install a resistor in series between the 50Ω source and the input capacitor, when the output drops by 1/2, I have found my input impedance. I used a 1206 smd resistor. Is this wrong? Mikek

I always write the pin out on the bag, so, I verified I wrote it correctly from a data sheet (3). I then rechecked the mounting on the pcb. I have it right according to the data sheets. Although my cheap Chinese Tester reads out the Drain and Source reversed from the datasheet. Mikek

Your chinese tester is not at fault - in most small jfets drain and source are interchangeable and symmetric.

piglet

If you do the calculations, you will find that adding a 10MΩ input meter on the gate you will measure 1.5V, because of the loading caused my the meter.

I did, just above.

I'll try changing the FET, again. Mikek

I figured that. Mikek

The 10meg loading of the voltmeter might be the cause?

piglet

For the low input impedance I would suspect that the FET you use turns up forward biased gate-source, can't think of another explanation if the FET is healthy etc.

Other things to try are:

1. Return R5 to ground instead of the emitter (possibly increasing its value too).

1. Lift one end of C3

2. Bootstrap C3 from the emitter rather than source

1. Are you sure there are no parasitic oscillations at UHF

piglet

Starting with oscillation, the signal looks clean. What should I expect when I lift C3? Voltage rolloff at 32MHz is 1 to 0.65 and when C3 is lifted I get 1 to 0.9. So, high frequency response improves without C3 in the circuit. Mikek

I installed a small cap right at the drain to ground, no change. I'm posting a picture of the PCB, to learn, not for harassment. :-) Tempted to shrink the the picture, but no. Note: I have changed semi conductors about 6 times.

have had the A, B, and C dc voltages vary over the various T1, Q2 changes, as I write I get A=2.4, B= 6.5 and C=5.8. My first dc measurements were A=1.48 B=8.55 and C=7.83. I have also had A=1.0, B= 5.24, and C=4.63. (A is altered by the 10MΩ meter impedance.) This doesn't have much effect on Gain. Mikek

BTW, I added a series resistor and a 21V zener to lower the B+ from 24.2V. The BF256C is rated at 25V, so just as a precaution I lowered it.

Mikek

Thanks for the PCB photo - you said you determine input impedance by adding series resistors, I cannot see them in the photo, where do you place them?

piglet

BTW you really shouldn't need that huge tantalum bead input capacitor, with a hi-z input in the tens kilohoms even 1nF would still be good down to 10-20kHz. Tants have leakage and with the high DC impedance a few hundred nA cap leakage will be significant. I don't see how cap leakage could explain the phenomenon you see but it is a complication you can do without?

piglet

Speaking of caps - how big is the output cap? The schematic you posted showed it as 0.1nF (which is 100pF) and seems way too small for a low-Z output. I'd suggest 0.1uF (100nF) as better and that looks like what you did in the PCB photo?

piglet

I only did it as a test, I didn't leave them in. Mikek