buried inside them FPGAs no doubt - state machines can eat jobs like this.
Good luck!
Cheers Terry
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19 years ago
Help with clock division question.
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19 years ago
Why not use the Zarlink MT9074 framer/transceiver? This one does E1 and T1 in one chip AND runs from a 20MHz clock source (it has an internal PLL). This saves board space and 20MHz is easier to create from 50Mhz. Create 40MHz by skipping one cycle every eight cycles at
50MHz and divide by 2 to create a symetric 20MHz clock. I've used the MT9075 (the E1 only version) for several projects and found it quite easy to use and straightforward to program.-- Reply to nico@nctdevpuntnl (punt=.) Bedrijven en winkels vindt U op www.adresboekje.nl